Patents Represented by Attorney Law Office of Gerald Maliszewski
  • Patent number: 8349745
    Abstract: A method is provided for fabricating a semiconductor nanoparticle embedded Si insulating film for short wavelength luminescence applications. The method provides a bottom electrode, and deposits a semiconductor nanoparticle embedded Si insulating film, including the element of N, O, or C, overlying the bottom electrode. After annealing, a semiconductor nanoparticle embedded Si insulating film has a peak photoluminescence (PL) at a wavelength in the range of 475 to 750 nanometers.
    Type: Grant
    Filed: November 10, 2008
    Date of Patent: January 8, 2013
    Assignee: Sharp Laboratory of America, Inc.
    Inventors: Pooran Chandra Joshi, Hao Zhang, Jiandong Huang, Apostolos T. Voutsas
  • Patent number: 8339543
    Abstract: A plasmonic display device is provided having dual modulation mechanisms. The device has an electrically conductive bottom electrode that may be either transparent or reflective. A dielectric layer overlies the bottom electrode, made from an elastic polymer material having a refractive index responsive to an electric field. An electrically conductive top electrode, either transparent or reflective, overlies the dielectric layer. A plasmonic layer, including a plurality of discrete plasmonic particles, is interposed between the top and bottom electrodes and in contact with the dielectric layer. In one aspect, the plasmonic layer is embedded in the dielectric layer. Alternately, the plasmonic layer overlies the bottom (or top) electrode. Then, the dielectric layer overlies the plasmonic layer particles and exposed regions of the bottom electrode between the first plasmonic layer particles.
    Type: Grant
    Filed: November 19, 2009
    Date of Patent: December 25, 2012
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Liang Tang, Akinori Hashimura, Apostolos T. Voutsas
  • Patent number: 8320622
    Abstract: A system and method are provided for color gradient object tracking. A tracking area is illuminated with a chromatic light source. A color value is measured, defined by at least three attributes, reflected from an object in the tracking area, and analyzed with respect to chromatic light source characteristics. A lookup table (LUT) is accessed that cross-references color values to positions in the tracking area, and in response to accessing the LUT, the object position in the tracking area is determined. The LUT is initially built by illuminating the tracking area with the light source. A test object is inserted into the tracking area in a plurality of determined positions, and the reflected color value is measured at each determined position. The color value measurements are correlated to determined positions. As a result, a color gradient can be measured between a first determined position and a second determined position.
    Type: Grant
    Filed: March 29, 2010
    Date of Patent: November 27, 2012
    Assignee: Sharp Laboratories of America, Inc.
    Inventor: Dana S. Smith
  • Patent number: 8314015
    Abstract: A process of silicon (Si) surface modification is provided for the electrochemical synthesis of Si particles in suspension. The process begins with a Si first substrate with a surface, and forms Si particles attached to the surface. Hydrogen-terminated Si particles are created and the first substrate is immersed in a hexane/1-octene (1/1 volume ratio) solution with a catalytic amount of chloroplatinic acid (H2PtCl6). 1-octene is bonded with the hydrogen-terminated Si particles, creating modified Si particles, with octane capping ligands, attached to the substrate surface. The first substrate is then exposed to ultrasonication, separating the modified Si particles from the first substrate. After removing the first substrate, a suspension is created of modified Si particles suspended in excess hexane/1-octene.
    Type: Grant
    Filed: July 14, 2010
    Date of Patent: November 20, 2012
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Chang-Ching Tu, Liang Tang, Apostolos T. Voutsas
  • Patent number: 8291421
    Abstract: A system and method are provided for determining processor usable idle time in a system employing a software instruction processor. The method establishes an idle task with a lowest processor priority for a processor executing application software instructions, and uses the processor to execute an idle task. The method ceases to execute the idle task in response to the processor executing application software instructions. The amount of periodic idle task execution is determined and stored in a tangible memory medium. For example, idle time amounts can be determined per a unit of time, i.e. a percentage per second. In one aspect, the method generates an idle task report. The report can be a periodic report expressing the duration of idle task execution per time period, or a course of execution report expressing idle task start times, idle task stop times, and durations between the corresponding start and stop times.
    Type: Grant
    Filed: November 19, 2008
    Date of Patent: October 16, 2012
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Tommy Lee Oswald, John C. Thomas, James E. Owen
  • Patent number: 8288645
    Abstract: A back contact single heterojunction solar cell and associated fabrication process are provided. A first semiconductor substrate is provided, lightly doped with a first dopant type. The substrate has a first energy bandgap. A second semiconductor is formed over a region of the substrate backside. The second semiconductor has a second energy bandgap, larger than the first energy bandgap. A third semiconductor layer is formed over the first semiconductor substrate topside, moderately doped with the first dopant and textured. An emitter is formed in the substrate backside, heavily doped with a second dopant type, opposite of the first dopant type, and a base is formed in the substrate backside, heavily doped with the first dopant type. Electrical contacts are made to the base and emitter. Either the emitter or base is formed in the second semiconductor.
    Type: Grant
    Filed: March 17, 2009
    Date of Patent: October 16, 2012
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Jong-Jan Lee, Paul J. Schuele, Steven R. Droes
  • Patent number: 8273034
    Abstract: A method for generating optimized tinnitus masks includes, for example, presenting stimuli in succession to a user, receiving the user's rating of the effectiveness of each presented stimulus in reducing tinnitus, selecting a subset of the stimuli to maintain as tinnitus masks, and, generating variant stimuli from the subset of the stimuli that is maintained as tinnitus masks.
    Type: Grant
    Filed: April 17, 2007
    Date of Patent: September 25, 2012
    Assignee: Natural Selection, Inc.
    Inventors: David B. Fogel, Gary B. Fogel
  • Patent number: 8268669
    Abstract: A method is provided for detecting laser optical paths in integrated circuit (IC) packages. The method provides an IC die encapsulated as a package in a compound of glass spheres and epoxy. Power is supplied to the IC. The IC is scanned with a laser. Typically, a laser wavelength is used that is minimally absorbed by the glass spheres in the epoxy compound of the IC package, and changes in current to the IC are detected. A detected current change is cross-referenced against a scanned IC package surface region. This process identifies an optical pathway underlying the scanned IC package surface region. In some aspects, this process leads to the identification of a glass sphere-collecting package structure underlying the optical pathway. Examples of a glass sphere-collecting structure might include an inner lead wire, lead frame edge, or die edge.
    Type: Grant
    Filed: March 17, 2011
    Date of Patent: September 18, 2012
    Assignee: Applied Micro Circuits Corporation
    Inventor: Joseph Martin Patterson
  • Patent number: 8270066
    Abstract: A display device is provided for reflecting a black color, as enabled by an optical splitting photonic liquid crystal waveguide. Sets of top and bottom electrodes are formed in a periodic pattern. A first dielectric layer overlies the set of bottom electrodes, made from a liquid crystal (LC) material with molecules having dipoles responsive to an electric field. A plasmonic layer, including a plurality of discrete plasmonic particles, is interposed between the sets of top and bottom electrodes, and is in contact with the first dielectric layer. A voltage potential is applied between the top and bottom electrodes, generating an electric field. Dipole local orientation and non-orientation regions are created in the liquid crystal molecules in response to the electric field, and a wavelength of light outside the visible spectrum is reflected in response to optical spectrum splitting of the incident light.
    Type: Grant
    Filed: August 31, 2010
    Date of Patent: September 18, 2012
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Liang Tang, Akinori Hashimura, Apostolos T. Voutsas
  • Patent number: 8264388
    Abstract: A digital phase-locked loop (DPLL), a supporting digital frequency integrator, and a method are provided for deriving a digital phase error signal in a DPLL. A digital frequency integrator periodically accepts a digital tdcOUT message from a Time-to-Digital Converter (TDC) representing a measured ratio of a reference clock (Tref) period to a synthesizer clock (Tdco) period. Also accepted is a digital message selecting a first ratio (Nf). In response, a digital phase error (pherr) message is periodically supplied that is proportional to an error in phase between the reference clock and the (synthesizer clock*Nf).
    Type: Grant
    Filed: October 6, 2010
    Date of Patent: September 11, 2012
    Assignee: Applied Micro Circuits Corporation
    Inventors: Hanan Cohen, Simon Pang
  • Patent number: 8264081
    Abstract: A multi-layered barrier metal thin film is deposited on a substrate by atomic layer chemical vapor deposition (ALCVD). The multi-layer film may comprise several different layers of a single chemical species, or several layers each of distinct or alternating chemical species. In a preferred embodiment, the multi-layer barrier thin film comprises a Tantalum Nitride layer on a substrate, with a Titanium Nitride layer deposited thereon. The thickness of the entire multi-layer film may be approximately fifty Angstroms. The film has superior film characteristics, such as anti-diffusion capability, low resistivity, high density, and step coverage, when compared to films deposited by conventional chemical vapor deposition (CVD). The multi-layered barrier metal thin film of the present invention has improved adhesion characteristics and is particularly suited for metallization of a Copper film thereon.
    Type: Grant
    Filed: December 19, 2005
    Date of Patent: September 11, 2012
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Wei Pan, Yoshi Ono, David R. Evans, Sheng Teng Hsu
  • Patent number: 8258499
    Abstract: A fabrication method is provided for a core-shell-shell (CSS) nanowire transistor (NWT). The method provides a cylindrical CSS nanostructure with a semiconductor core, an insulator shell, and a conductive shell. The CSS nanostructure has a lower hemicylinder overlying a substrate surface. A first insulating film is conformally deposited overlying the CSS nanostructure and anisotropically plasma etched. Insulating reentrant stringers are formed adjacent the nanostructure lower hemicylinder. A conductive film is conformally deposited and selected regions are anisotropically plasma etched, forming conductive film gate straps overlying a gate electrode in a center section of the CSS nanostructure. An isotropically etching removes the insulating reentrant stringers adjacent the center section of the CSS nanostructure, and an isotropically etching of the conductive shell overlying the S/D regions is performed. A screen oxide layer is deposited over the CSS nanostructure.
    Type: Grant
    Filed: March 17, 2011
    Date of Patent: September 4, 2012
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Mark A. Crowder, Yutaka Takafuji
  • Patent number: 8259738
    Abstract: A system and method are provided for prioritizing network processor information flow in a channel service manager (CSM). The method receives a plurality of information streams on a plurality of input channels, and selectively links input channels to CSM channels. The information streams are stored, and the stored the information streams are mapped to a processor queue in a group of processor queues. Information streams are supplied from the group of processor queues to a network processor in an order responsive to a ranking of the processor queues inside the group. More explicitly, selectively linking input channels to CSM channels includes creating a fixed linkage between each input port and an arbiter in a group of arbiters, and scheduling information streams in response to the ranking of the arbiter inside the group. Finally, a CSM channel is selected for each information stream scheduled by an arbiter.
    Type: Grant
    Filed: May 1, 2007
    Date of Patent: September 4, 2012
    Assignee: Net Navigation Systems, LLC
    Inventors: Alexander Sgouros, Vladislav Kopzon, Noam Halevy
  • Patent number: 8255779
    Abstract: A system and method are provided for accelerating forward error correction (FEC) synchronization in a communicating receiver. On the transmitter side, the method accepts an energy waveform representing a packet of data symbols, encodes the packet, and creates an FEC block. Prior to transmitting the FEC block, an electromagnetic waveform is transmitted representing an FEC flag character. Then, an electromagnetic waveform representing the FEC block is transmitted a predetermined first period of time after the transmission of the FEC flag character. For example, the first time period may be immediately following the FEC flag character transmission or a predetermined number of idle characters following the transmission of the FEC flag character.
    Type: Grant
    Filed: May 13, 2009
    Date of Patent: August 28, 2012
    Assignee: Applied Micro Circuits Corporation
    Inventor: Bradley John Booth
  • Patent number: 8248945
    Abstract: A method is provided for managing a transmit buffer using per priority pause flow control. An Ethernet transceiver generates packet descriptors identifying packets to be transmitted that are stored in memory. A priority is assigned to each descriptor and associated packet. Each descriptor is loaded into a queue having a queue priority associated with the descriptor priority. In response to accessing a first descriptor, output from a selected first priority queue, a first packet associated with the first descriptor is fetched into a transmit buffer from the memory. If subsequent to fetching the first packet, a per priority flow control message is received pausing first priority packets, the first packet is flushed from the transmit buffer. Then, a second descriptor is accessed from a selected second priority queue, and a second packet associated with the second descriptor is fetched and transmitted from the transmit buffer.
    Type: Grant
    Filed: April 12, 2010
    Date of Patent: August 21, 2012
    Assignee: Applied Micro Circuits Corporation
    Inventors: Satish Sathe, Satish Singh, Jaspreet Singh Gambhir, Sundeep Gupta
  • Patent number: 8249080
    Abstract: A system and method are provided for transporting a serial stream via a lower speed network using multiple parallel paths. At a transmitter, an optical or electromagnetic waveform is accepted representing a serial stream of digital information, and unbundled into n virtual information streams. Each virtual information stream is divided into a sequence of segments. Each segment is encapsulated, creating a sequence of packets by adding a start indicator to the beginning of each segment, and a terminate indicator to the end of each segment. Each packet is disinterleaved across m lanes and reinterleaved into n branches of framed data. Optical or electromagnetic waveforms representing the framed data are transmitted via n network branches. A receiver is also provided, which essentially reverses the above-described transmission method.
    Type: Grant
    Filed: December 2, 2010
    Date of Patent: August 21, 2012
    Assignee: Applied Micro Circuits Corporation
    Inventors: Dimitrios Giannakopoulos, Matthew Ornes, Matthew Brown, Tracy Ma
  • Patent number: 8249109
    Abstract: An information packet preclassification system and method are provided. The method receives a packet of information and differentiates the packet into segments. Using a decision tree with multiple levels, segments in the packet are compared to a node at a tree level, where each node includes a plurality of node reference segments and corresponding node comparison operators. The reference segment may be a different segment from the packet, or a predetermined segment value stored in memory. One, or more classification attributes are accessed in response to comparing segments, and the classification attributes are assigned to the packet. Then, the packet is processed in response to the classification attributes.
    Type: Grant
    Filed: April 6, 2010
    Date of Patent: August 21, 2012
    Assignee: Net Navagation Systems LLC
    Inventors: Alexander Sgouros, Leonard Bush, Christopher Dean Bergen, Sourav Chakrabroty
  • Patent number: 8248106
    Abstract: A system and method are provided for frequency lock detection using a digital phase error. A lock detection module accepts a digital phase error (pherr) message proportional to an error in phase between a reference clock and a (synthesizer clock*Nf). Also accepted is a unitless frequency error tolerance value (?f). The lock detection module periodically supplies a lock detect signal, indicating whether the synthesizer clock frequency is within the frequency error tolerance value of the reference clock frequency.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: August 21, 2012
    Assignee: Applied Micro Circuits Corporation
    Inventors: Hanan Cohen, Simon Pang
  • Patent number: 8242482
    Abstract: An electroluminescence (EL) device and a method are provided for fabricating said device with a nanotip electrode. The method comprises: forming a bottom electrode with nanotips; forming a Si phosphor layer adjacent the nanotips; and, forming a transparent top electrode. The Si phosphor layer is interposed between the bottom and top electrodes. The nanotips may have a tip base size of about 50 nanometers, or less, a tip height in the range of 5 to 50 nm, and a nanotip density of greater than 100 nanotips per square micrometer. Typically, the nanotips are formed from iridium oxide (IrOx) nanotips. A MOCVD process forms the Ir bottom electrode. The IrOx nanotips are grown from the Ir. In one aspect, the Si phosphor layer is a SRSO layer. In response to an SRSO annealing step, nanocrystalline SRSO is formed with nanocrystals having a size in the range of 1 to 10 nm.
    Type: Grant
    Filed: March 5, 2008
    Date of Patent: August 14, 2012
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Sheng Teng Hsu, Fengyan Zhang, Gregory M. Stecker, Robert A. Barrowcliff
  • Patent number: 8244143
    Abstract: A system and method are provided for calibrating orthogonal polarity in a multichannel optical transport network (OTN) receiver. The method accepts a composite signal and separates the polarization of the signal into a pair of 2n-phase shift keying (2n-PSK) modulated input signals via Ix and Qx optical signal paths, where n?1. Likewise, a pair of 2p-PSK modulated input signals are accepted via Iy and Qy optical signal paths where p?1. Polarization-adjusted I?x, Q?x, I?y, and Q?y signals are generated. An average magnitude is compared to either 2× the absolute magnitude of (I?x and Q?x), or 2× the absolute magnitude of (I?y and Q?y). The average magnitude value can be used that is either 2× (a predetermined peak signal amplitude), or the sum of the absolute magnitudes of (I?x and Q?x) and (I?y and Q?y). The polarization-adjusted I?x, Q?x, I?y, and Q?y signals are modified until the magnitude comparison is about zero.
    Type: Grant
    Filed: September 2, 2009
    Date of Patent: August 14, 2012
    Assignee: Applied Micro Circuits Corporation
    Inventors: Keith Conroy, Omer Acikel