Patents Represented by Attorney Law Offices of Bradley J. Bereznak
  • Patent number: 7585719
    Abstract: A monolithic integrated circuit fabricated on a semiconductor die includes a control circuit and a first output transistor having segments substantially equal to a first length. A second output transistor has segments substantially equal to a second length. The first and second output transistors occupy an L-shaped area of the semiconductor die, the L-shaped area having first and second inner sides that are respectively disposed adjacent first and second sides of the control circuit. At least one of the first and second output transistors is coupled to the control circuit. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. 37 CFR 1.72(b).
    Type: Grant
    Filed: May 8, 2008
    Date of Patent: September 8, 2009
    Assignee: Power Integrations, Inc.
    Inventor: Balu Balakrishnan
  • Patent number: 7567527
    Abstract: A network for wireless transmission of data includes a source access point, a destination device and a plurality of wireless repeaters that provide a transmission link between the source access point and the destination device. The plurality of access points each includes a single transceiver with separate transmitter and receiver sections operable to simultaneously transmit and receive data on different frequency channels. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. 37 CFR 1.72(b).
    Type: Grant
    Filed: April 4, 2003
    Date of Patent: July 28, 2009
    Assignee: OnLive, Inc.
    Inventor: Stephen G. Perlman
  • Patent number: 7558525
    Abstract: A video repository unit includes a plurality of disk drives arranged in a redundant array and circuitry to control writing/reading of video programs to/from the redundant array. A wireless transceiver receives video programs and transmits a selected video program to a remote viewer responsive to a request received by the wireless transceiver. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
    Type: Grant
    Filed: December 10, 2002
    Date of Patent: July 7, 2009
    Assignee: OnLive, Inc.
    Inventor: Stephen G. Perlman
  • Patent number: 7557406
    Abstract: In one embodiment, a transistor fabricated on a semiconductor die includes a first section of transistor segments disposed in a first area of the semiconductor die, and a second section of transistor segments disposed in a second area of the semiconductor die adjacent the first area. Each of the transistor segments in the first and second sections includes a pillar of a semiconductor material that extends in a vertical direction. First and second dielectric regions are disposed on opposite sides of the pillar. First and second field plates are respectively disposed in the first and second dielectric regions. Outer field plates of transistor segments adjoining first and second sections are either separated or partially merged.
    Type: Grant
    Filed: February 16, 2007
    Date of Patent: July 7, 2009
    Assignee: Power Integrations, Inc.
    Inventors: Vijay Parthasarathy, Wayne Bryan Grabowski
  • Patent number: 7515542
    Abstract: A broadband access node includes a port for connection with a Digital Subscriber Line and a processor to run code that implements a virtual maintenance end point (vMEP). The vMEP translates an IEEE 802.1ag Loopback Message (LBM) received from a device on an Ethernet access network into a legacy operations and maintenance (OAM) message that is transmitted to a residential gateway (RG) device. The legacy OAM message determines a link-level connectivity status between broadband access node and the RG device. The vMEP also transmits a reply message back to the device on an Ethernet access network in compliance with the IEEE 802.1ag specification. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. 37 CFR 1.72(b).
    Type: Grant
    Filed: July 12, 2005
    Date of Patent: April 7, 2009
    Assignee: Cisco Technology, Inc.
    Inventors: Yves Hertoghs, Ali Sajassi, Norman W. Finn, Wojciech Dec
  • Patent number: 7499395
    Abstract: A system and method for bidirectional forwarding detection (BFD) rate-limiting and automatic BFD session activation includes tracking a total bidirectional forwarding detection (BFD) packet rate for a line card (LC) of the node, and rejecting operations associated with creation of a new BFD session that would cause the total BFD packet rate to exceed a predetermined maximum rate. The new BFD session is stored in a state on the node and the operations of the new BFD session are automatically retried at a time when doing so would not exceed the predetermined maximum rate. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
    Type: Grant
    Filed: March 18, 2005
    Date of Patent: March 3, 2009
    Assignee: Cisco Technology, Inc.
    Inventors: Reshad Rahman, David Toscano, David Ward, Jean-Marc Simard, Christian E. Hopps
  • Patent number: 7494875
    Abstract: A method, in one embodiment, includes etching first and second dielectric regions in a substantially isotropic manner through first and second openings of a mask layer to create first and second trenches. The first and second dielectric regions are disposed on opposite sides of a mesa of semiconductor material, the mesa having first and second sidewalls that respectively adjoin the first and second dielectric regions. The first and second dielectric regions in the first and second trenches are then etched in a substantially isotropic manner to expose the first and second sidewalls. A gate oxide is formed on the first and second sidewalls of the mesa. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure.
    Type: Grant
    Filed: March 15, 2008
    Date of Patent: February 24, 2009
    Assignee: Power Integrations, Inc.
    Inventor: Donald Ray Disney
  • Patent number: 7493078
    Abstract: An antenna assembly includes a reflector dish and a unit attached at a distal end of an arm to receive satellite signals reflected from the reflector dish. The unit includes at least one low-noise block converter (LNB) to receive the satellite signals and a wireless communication transceiver that operates to transmit and receive video and data information within a surrounding range.
    Type: Grant
    Filed: December 10, 2002
    Date of Patent: February 17, 2009
    Assignee: OnLive, Inc.
    Inventor: Stephen G. Perlman
  • Patent number: 7471665
    Abstract: A network for wireless transmission of data includes a source access point, a destination device and a plurality of wireless repeaters that provide a transmission link between the source access point and the destination device. The plurality of access points each includes a single transceiver with separate transmitter and receiver sections operable to simultaneously transmit and receive data on different frequency channels. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. 37 CFR 1.72(b).
    Type: Grant
    Filed: May 5, 2007
    Date of Patent: December 30, 2008
    Assignee: OnLive, Inc.
    Inventor: Stephen G. Perlman
  • Patent number: 7469155
    Abstract: Apparatus for automatically alerting a user of a handheld communications device of an incoming transmission includes a plurality of sensors each of which produces a signal indicative of a physical parameter of a surrounding environment of the handheld communications device. Also included is a processor that executes a programmed set of instructions to determine an optimal alert mode setting based on a combination of the sensor signals. A plurality of output units produces one or more sensory alert outputs In response to the optimal alert mode setting. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. 37 CFR 1.72(b).
    Type: Grant
    Filed: November 29, 2004
    Date of Patent: December 23, 2008
    Assignee: Cisco Technology, Inc.
    Inventor: Steve C. Chu
  • Patent number: 7468536
    Abstract: In one embodiment, a transistor fabricated on a semiconductor die is arranged into sections of elongated transistor segments. The sections are arranged in rows and columns substantially across the semiconductor die. Adjacent sections in a row or a column are oriented such that the length of the transistor segments in a first one of the adjacent sections extends in a first direction, and the length of the transistor segments in a second one of the adjacent sections extends in a second direction, the first direction being substantially orthogonal to the second direction. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure.
    Type: Grant
    Filed: February 16, 2007
    Date of Patent: December 23, 2008
    Assignee: Power Integrations, Inc.
    Inventor: Vijay Parthasarathy
  • Patent number: 7466694
    Abstract: A node for routing of calls in a network has an interface coupled to the network and at least one processor operable to route a packet-based call to a telephony destination in accordance with a protocol that includes a set of attributes that describe packet-network routing characteristics of one or more Internet Protocol (IP)-IP gateway devices in the network. The attributes are used by the at least one processor to specify a call route through an IP-IP gateway device for the packet-based call. The set of attributes include a first attribute that identifies a total administratively provisioned bandwidth capacity available on a given call route to accommodate application traffic, and a second attribute that identifies a current bandwidth that is available on the given call route to accommodate the application traffic at a given point in time.
    Type: Grant
    Filed: June 10, 2006
    Date of Patent: December 16, 2008
    Assignee: Cisco Technology, Inc.
    Inventors: Xiaode Xu, Manjunath S. Bangalore, Dhaval Shah
  • Patent number: 7463730
    Abstract: A system includes a computer workstation associated with an agent of a call center and a subsystem that includes automatic call distributor (ACD) functions for connecting a caller to the computer workstation of the agent, the subsystem being connected with a device of the caller via an Internet Protocol (IP) network. The agent transmits a first message over the IP network to a device of the caller during the call. The first message contains notes electronically recorded by the agent. Prior to or coincident with an end of the call, the caller sends a second message back to the system confirming the agent's notes. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. 37 CFR 1.72(b).
    Type: Grant
    Filed: October 6, 2005
    Date of Patent: December 9, 2008
    Assignee: Cisco Technology, Inc.
    Inventors: Vinod Katkam, Mukul Jain
  • Patent number: 7459366
    Abstract: A high-voltage transistor includes first and second trenches that define a mesa in a semiconductor substrate. First and second field plate members are respectively disposed in the first and second trenches, with each of the first and second field plate members being separated from the mesa by a dielectric layer. The mesa includes a plurality of sections, each section having a substantially constant doping concentration gradient, the gradient of one section being at least 10% greater than the gradient of another section. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
    Type: Grant
    Filed: December 19, 2007
    Date of Patent: December 2, 2008
    Assignee: Power Integrations, Inc.
    Inventors: Sujit Banerjee, Donald Ray Disney
  • Patent number: 7391088
    Abstract: A monolithic integrated circuit fabricated on a semiconductor die includes a control circuit and a first output transistor having segments substantially equal to a first length. A second output transistor has segments substantially equal to a second length. The first and second output transistors occupy an L-shaped area of the semiconductor die, the L-shaped area having first and second inner sides that are respectively disposed adjacent first and second sides of the control circuit. At least one of the first and second output transistors is coupled to the control circuit. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
    Type: Grant
    Filed: May 3, 2007
    Date of Patent: June 24, 2008
    Assignee: Power Integrations, Inc.
    Inventor: Balu Balakrishnan
  • Patent number: 7335944
    Abstract: A high-voltage transistor includes first and second trenches that define a mesa in a semiconductor substrate. First and second field plate members are respectively disposed in the first and second trenches, with each of the first and second field plate members being separated from the mesa by a dielectric layer. The mesa includes a plurality of sections, each section having a substantially constant doping concentration gradient, the gradient of one section being at least 10% greater than the gradient of another section. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
    Type: Grant
    Filed: January 30, 2007
    Date of Patent: February 26, 2008
    Assignee: Power Integrations, Inc.
    Inventors: Sujit Banerjee, Donald Ray Disney
  • Patent number: 7253059
    Abstract: A monolithic power integrated circuit fabricated on a semiconductor die includes a control circuit and a first output high voltage field-effect transistor (HVFET) having source and drain segments substantially equal to a first length. A second output HVFET has source and drain segments substantially equal to a second length. At least one of the first and second output HVFETs is coupled to the control circuit. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: August 7, 2007
    Assignee: Power Integrations, Inc.
    Inventor: Balu Balakrishnan