Patents Represented by Attorney Law Offices of Imam
  • Patent number: 7477481
    Abstract: A perpendicular write head for writing data onto tracks includes a main pole, a trailing shield and bilayer trailing shield gap layer between the main pole and the trailing shield and improving writing and track width control.
    Type: Grant
    Filed: August 1, 2005
    Date of Patent: January 13, 2009
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Hung-Chin Guthrie, Ming Jiang, Aron Pentek, Sue Siyang Zhang, Tsung Yuan Chen, Yinshi Liu
  • Patent number: 7469467
    Abstract: A perpendicular write head includes a main pole comprising a Durimide/Alumina hard mask formed over a laminate layer process to form the main pole without using a liftoff or chemical mechanical polishing process, thereby avoiding rounding corners of the pole, the main pole being controlled in shape for improved control of critical dimension of track width and angle of the bevel to avoid undesirable adjacent track writing.
    Type: Grant
    Filed: August 1, 2005
    Date of Patent: December 30, 2008
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Yunxiao Gao, Hung-Chin Guthrie, Ming Jiang, Sue Siyang Zhang
  • Patent number: 7441325
    Abstract: A perpendicular write head including a main pole and a trailing shield, the main pole being made of a diamond-like carbon (DLC) layer as hard mask and a rhodium (Rh) layer as shield gap, both DLC and Rh layers being CMP stop layers so as to avoid corner rounding and damage from chemical mechanical planarization (CMP) process, the DLC layer being removed by reactive ion etching (RIE) to create a trench, the trailing shield being deposited into the trench for self alignment.
    Type: Grant
    Filed: August 1, 2005
    Date of Patent: October 28, 2008
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Yunxiao Gao, Hung-Chin Guthrie, Ming Jiang, Sue Siyang Zhang
  • Patent number: 7433663
    Abstract: A multiple receiving antennae system having a plurality of radio frequency (RF) modules being responsive to incoming signals for processing the same to generate baseband signals. The multiple receiving antennae system further processes baseband signals to generate digital baseband signals, in accordance with an embodiment of the present invention. The multiple receiving antennae system further still includes a plurality of automatic gain control (AGC) modules being responsive to digital baseband signals for processing the same to generate a plurality of gain values. The plurality of gain values are used in the plurality of RF modules for independent gain adjustment of the incoming signals. The plurality of gain values are used to generate adjusted signals with enhanced signal to noise ratio (SNR) to improve the performance of the multiple receiving antennae system, whereby the plurality of gain values are used to enhance reception of incoming signals by improving SNR.
    Type: Grant
    Filed: May 27, 2005
    Date of Patent: October 7, 2008
    Assignee: Ralink Technology, Inc.
    Inventor: Po-Yuen Cheng
  • Patent number: 7420803
    Abstract: A universal serial bus (USB) flash drive pen device for deploying and retracting a USB plug connector having a pusher assembly including a USB flash drive and a USB plug connector, in accordance with an embodiment of the present invention. The USB flash drive pen device further includes a housing assembly at least partially enclosing said pusher assembly for deploying said USB plug connector, said USB flash drive being coupled to said USB plug connector, said pusher assembly retracting said USB plug connector into said housing assembly, said USB flash drive pen device for deploying said USB plug connector to couple said USB flash drive to a USB port.
    Type: Grant
    Filed: March 5, 2007
    Date of Patent: September 2, 2008
    Assignee: Super Talent Electronics, Inc.
    Inventors: Paul Hsueh, Jin Kyu Kim, Nan Nan, David Nguyen, Ming-Shiang Shen
  • Patent number: 7407393
    Abstract: An embodiment of the present invention includes a super slim compact flash (CF) light Universal Serial Bus (USB) device having a top cover, a top cover slot formed within the top cover and forming a top cover slot cavity, a sliding plug connector positioned within the cavity and flexibly movable therein, a plastic frame disposed below and around the top cover, a retractable slim USB plug connector sub-assembly on top of which and connected thereto is placed the sliding plug connector, the sub-assembly including a retractable slim USB plug connector positioned within the device to be flexibly retracted from or pulled into the device by the sliding plug connector for causing connection to a mating USB plug connector.
    Type: Grant
    Filed: April 24, 2007
    Date of Patent: August 5, 2008
    Assignee: Super Talent Electronics, Inc.
    Inventors: Jim C. Ni, Ming-Shiang Shen
  • Patent number: 7396768
    Abstract: In one method and embodiment of the present invention, at least one coil layer is formed in a write head, using a two-slurry step of copper damascene chemical mechanical polishing method with a first slurry step removing the undesirable copper that is on top of the tantalum barrier layer and on top of the trenches and a second slurry step removing the remainder of the undesirable copper, the tantalum barrier layer, the silicon dioxide hard mask layer, the hard baked photoresist layer, the magnetic alloy such as NiFe, CoFe, or CoNiFe, and alumina insulating layer for better thin film magnetic head performances.
    Type: Grant
    Filed: October 20, 2006
    Date of Patent: July 8, 2008
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Jian-Huei Feng, Hung-Chin Guthrie, Ming Jiang, Sue Siyang Zhang
  • Patent number: 7395595
    Abstract: A method for forming a P3 layer with NiFe and alumina mask using resist shrink process for use in perpendicular magnetic write heads. The method includes forming a laminated layer, forming an alumina layer on top of the laminated layer, depositing a conductive layer onto the laminated layer, forming a plating frame on a gap layer. The plating frame has a trench defined by plating track, the alumina, laminated and conductive layers each including an area below the trench. The method further includes shrinking the trench, plating NiFe into a portion of the shrunk trench, stripping the plating frame, removing the conductive layer except the conductive layer formed below the trench, removing the alumina layer except the alumina layer formed below the trench, removing the laminated layer except the laminated layer formed below the trench and patterning the laminated layer formed below the trench.
    Type: Grant
    Filed: April 19, 2005
    Date of Patent: July 8, 2008
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Kim Yang Lee, Jyh-Shuey Lo, Yi Zheng
  • Patent number: 7369626
    Abstract: A modem system for receiving and transmitting signals having a frequency domain equalizer (FEQ) block being responsive to a frequency channel response for processing the same to generate one or more initial FEQ coefficients (FEQ1), the modem system is responsive to an input signal for processing the same to generate frequency channel response, the input signal being generated from a transmitted signal, FEQ block using FEQ1 to generate an equalized Signal, modem system demodulating equalized Signal to generate a demodulated Signal symbol, in accordance with an embodiment of the present invention.
    Type: Grant
    Filed: February 18, 2004
    Date of Patent: May 6, 2008
    Assignee: Ralink Technology, Inc.
    Inventors: Alain Chiodini, Thomas Edward Pare, Jr.
  • Patent number: 7348861
    Abstract: One embodiment of the present invention includes a frequency generation circuit including a control module, an oscillator circuit coupled to the control module, the oscillator circuit having a start-up time defined by the time required to reach a desired frequency. The oscillator circuit includes an amplifier having an input and an output and being programmably-alterable by the control module, a first capacitor coupled to the input of the amplifier and being programmably-alterable, in capacitance, by the control module, a second capacitor coupled to the output of the amplifier, a crystal resonator coupled to the first and second capacitors for generating an output signal having a desired frequency, wherein fast start-up time is achieved.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: March 25, 2008
    Assignee: Ralink Technology, Inc.
    Inventors: I-chang Wu, Chung Wen Lo, Keng Leong Fong
  • Patent number: 7324608
    Abstract: A modem system for receiving and transmitting signals having a frequency domain equalizer (FEQ) block being responsive to a frequency channel response for processing the same to generate one or more equalizer coefficients, the modem system is responsive to an input signal for processing the same to generate frequency channel response, the input signal being generated from transmission of a transmitted signal, FEQ block for using equalizer coefficients to generate an equalized channel response, modem system for using equalized channel response to generate one or more metric weights, in accordance with an embodiment of the present invention.
    Type: Grant
    Filed: February 18, 2004
    Date of Patent: January 29, 2008
    Assignee: Ralink Technology, Inc.
    Inventors: Alain Chiodini, Thomas Edward Pare, Jr.
  • Patent number: 7313750
    Abstract: A receiver system that receives signals and has a demapper device that is responsive to an equalizer output and generates a demapper output including one or more bit metrics. The receiver system also generates equalizer output, and the demapper uses distance measure to calculate bit metrics. The receiver system uses demapper output to generate a processed output. The receiver system further includes a convolutional decoder which is responsive to the processed output, and subsequently generates a decoded bit sequence, as well as uses the processed output to generate one or more path metrics. The convolutional decoder uses bit metrics and path metrics to the decode processed output, to generate a decoded bit sequence. The receiver system uses the distance measure to reduce the size of the bit metrics and the size of the path metrics to improve the performance of said convolutional decoder.
    Type: Grant
    Filed: August 5, 2004
    Date of Patent: December 25, 2007
    Assignee: Ralink Technology, Inc.
    Inventors: Shuling Feng, Chien-Cheng Tung
  • Patent number: 7295401
    Abstract: A perpendicular write head is disclosed for writing information onto tracks. The write head includes a top pole and a return pole and side shields with laminated layers wherein said laminated layers have magnetization in a direction parallel to an air bearing surface (ABS) and perpendicular to the tracks.
    Type: Grant
    Filed: October 27, 2004
    Date of Patent: November 13, 2007
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Wipul Pemsiri Jayasekara, Hardayal Singh Gill
  • Patent number: 7266146
    Abstract: A maximum likelihood sequence estimator (MLSE) equalizer device being included in an MLSE sub-receiver includes a feedforward circuit responsive to input data for processing the same to generate feedforward circuit output, said input data being generated from transmitted data being transmitted by wireless transmission, in accordance with an embodiment of the present invention. The MLSE equalizer device further includes a feedback circuit responsive to said input data for processing the same to generate feedback circuit output.
    Type: Grant
    Filed: March 28, 2003
    Date of Patent: September 4, 2007
    Assignee: Ralink Technology, Inc.
    Inventors: Thomas Edward Pare, Jr., Chien-Cheng Tung, Cedric Choi
  • Patent number: 7248650
    Abstract: A coding/decoding trellis structure circuit included in a maximum likelihood sequence estimator (MLSE) sub-receiver having one or more distance calculation units (distus) responsive to equalized data generated by said MLSE sub-receiver from wireless transmission of transmitted data, said distu further responsive to MLSE codewords for processing the same, said equalized data including one or more equalized data chips and each of said MLSE codewords including one or more MLSE codeword chips, each of said distus for processing an equalized data chip and an MLSE codeword chip to generate a chip output, said distu for using said chip output to generate distance measures, a distance measure being the distance between said equalized data and said MLSE codeword, in accordance with an embodiment of the present invention.
    Type: Grant
    Filed: June 4, 2003
    Date of Patent: July 24, 2007
    Assignee: Ralink Technology, Inc.
    Inventors: Chien-Cheng Tung, Julian Chih Liang Chang
  • Patent number: 7245677
    Abstract: A modem receiver for receiving signals having a frequency domain equalizer training module (FTM) being responsive to a frequency channel response for processing the same to generate one or more frequency domain equalizer (FEQ) coefficients, said modem receiver being responsive to an input signal for processing the same to generate said frequency channel response, said input signal being generated from transmission of a transmitted signal, said frequency channel response for including one or more pilot tones, said FEQ coefficients for including one or more pilot tone FEQ coefficients, in accordance with an embodiment of the present invention.
    Type: Grant
    Filed: March 9, 2004
    Date of Patent: July 17, 2007
    Assignee: Ralink Technology, Inc.
    Inventor: Thomas Edward Pare, Jr.
  • Patent number: 7246220
    Abstract: In one embodiment of the present invention, a processing system for processing information efficiently and cost-effectively by switching between execution of time-critical and non-time-critical tasks includes a processing unit. The processing system further includes a first register group coupled to the processing unit and including a first set of registers, the processing unit reading the status of the first set of registers to execute time-critical tasks.
    Type: Grant
    Filed: July 27, 2001
    Date of Patent: July 17, 2007
    Assignee: Magnum Semiconductor, Inc.
    Inventors: Hown Cheng, Chenhui Feng
  • Patent number: 7197094
    Abstract: A maximum likelihood sequence estimator (MLSE) sub-receiver is disclosed, in one embodiment of the present invention and includes an MLSE equalizer device responsive to input data to generate equalized data. The input data is generated from transmitted data by wireless transmission. The MLSE equalizer device processes the input data to generate residual channel response using a known codebook and the residual channel response to generate an MLSE codebook. The MLSE sub-receiver further includes an MLSE decoder responsive to the equalized data and the MLSE codebook for processing to determine maximum likelihood between the equalized data and the MLSE codebook. The MLSE decoder uses the maximum likelihood for decoding the equalized data to generate a decoded transmitted data by mitigating the effects of multi-path communication channel due to wireless transmission of the transmitted data.
    Type: Grant
    Filed: March 28, 2003
    Date of Patent: March 27, 2007
    Assignee: Ralink Technology, Inc.
    Inventor: Chien-Cheng Tung
  • Patent number: 7185208
    Abstract: In one embodiment of the present invention, there is disclosed a reversible method of processing data comprising the data being encrypted before being written to a non-volatile memory wherein the data cannot be accessed without decryption in the case of a direct physical access to the non-volatile memory.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: February 27, 2007
    Assignee: Lexar Media, Inc.
    Inventor: Sergey Anatolievich Gorobets
  • Patent number: D545318
    Type: Grant
    Filed: February 17, 2004
    Date of Patent: June 26, 2007
    Assignee: Lexar Media, Inc.
    Inventors: David Charles Klenske, Koen Berend Koevoets