Patents Represented by Attorney, Agent or Law Firm Lawrence D. Cutter
  • Patent number: 5537431
    Abstract: A method and apparatus reliably and robustly decode single width bar codes that may be placed on a variety of materials. The decoding is independent of whether or not the bar code represents dark bars on a light background or light bars on a dark background. The decoder may be implemented either in hardware or as part of a program in a stored program general purpose computer. The signal processing approach taken generates gap sequence information from width sequence information to match predetermined gap sequence patterns. The method and apparatus of the present invention are also particularly amenable to independent creation of the gap sequences from three different techniques which are independent and which thus add robustness to the system. Lastly, the decoding method of the present invention takes advantage of a preprocessing function to remove any certain forms of noise that may be present in the scanned data.
    Type: Grant
    Filed: June 15, 1994
    Date of Patent: July 16, 1996
    Assignee: International Business Machines Corporation
    Inventors: Chin-Long Chen, Mu-Yue Hsiao
  • Patent number: 5537427
    Abstract: A method for encoding and decoding signals in accordance with a class of modular coding schemes is employed. Through a representation of Galois field elements in terms of a normal basis, wherein subsequent basis entries are squares of previous entries, it is possible to construct quasi-cyclic codes capable of double error correction and triple error detection. Modularity is achieved both at the time of check bit generation and also at the time of syndrome generation. Moreover, this achievement is carried out so as to be applicable in the domain of double error correction codes. The code avoids duplication of circuitry and is efficient in terms of delay through logic gate levels. The code also provides the capability of having byte parity check indications which are helpful for isolating failures.
    Type: Grant
    Filed: August 9, 1993
    Date of Patent: July 16, 1996
    Assignee: International Business Machines Corporation
    Inventor: Chin-Long Chen
  • Patent number: 5535139
    Abstract: In a tool for measuring optical power on a fiber optic cable link, optical conditioning means in conjunction with a splitter are used to achieve measurement consistency and repeatability. In accordance with preferred embodiments of the present invention, light conditioning means are provided by disposing the optical fiber cable in a position so as to achieve mode filtering. This may be accomplished either by disposing the optical fiber in a coil, as for example in a mandrel, or disposing the coil in a series of serpentine or zig-zag paths.
    Type: Grant
    Filed: April 4, 1994
    Date of Patent: July 9, 1996
    Assignee: International Business Machines Corporation
    Inventors: Wayne A. Barringer, Casimer M. Decusatis, Daniel J. Stigliani, Jr.
  • Patent number: 5535226
    Abstract: In one aspect, a memory device employing device-level error correction tracks the status of the error correction in terms of whether error correction is active or inactive, whether an uncorrectable error beyond the capability of the device-level correction is detected, whether a recovery option from an uncorrectable error is active and whether the recovery option has been reset. In another aspect, a diagnostic method for determining a status for one or more aspects of device-level error correction employed by a memory device is provided. In the diagnostic method, the status is determined for the one or more aspects, a flag is set based on the status, the flag is latched, a diagnostic code is input into the memory device and the latched flag is read.
    Type: Grant
    Filed: May 31, 1994
    Date of Patent: July 9, 1996
    Assignee: International Business Machines Corporation
    Inventors: Charles E. Drake, John A. Fifield, Richard D. Wheeler, Barry J. Wolford
  • Patent number: 5533036
    Abstract: In a memory system comprising a plurality of memory units each of which possesses unit-level error correction capabilities and each of which are tied to a system level error correction function, memory reliability is enhanced by providing means for disabling the unit-level error correction capability, for example, in response to the occurrence of an uncorrectable error in one of the memory units. This counter-intuitive approach which disables an error correction function nonetheless enhances overall memory system reliability since it enables the employment of the complement/recomplement algorithm which depends upon the presence of reproducible errors for proper operation. Thus, chip level error correction systems, which are increasingly desirable at high packaging densities, are employed in a way which does not interfere with system level error correction methods.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: July 2, 1996
    Assignee: International Business Machines Corporation
    Inventors: Robert M. Blake, Douglas C. Bossen, Chin-Long Chen, John A. Fifield, Howard L. Kalter
  • Patent number: 5530964
    Abstract: In one aspect, a software development technique is capable of efficiently organizing for execution a conditional code segment having multiple associated conditional paths. The development technique employs in association with each path of the code segment, a probability compiler directive which dictates to the compiler a probability for satisfying a conditional test of the associated path. In another aspect, a system/process is capable of optimizing organization of assembled program code for a code's particular execution environment. This optimization approach tunes assembled code organization for each specific execution environment, employing run-time based statistical data collected during performance execution of the assembled code. The execution environment, consisting of hardware, software, and other factors such as workload, input data, etc., can also be collected and employed by an optimizer unit to best reorganize the assembled program code for a current execution environment.
    Type: Grant
    Filed: September 19, 1994
    Date of Patent: June 25, 1996
    Assignee: International Business Machines Corporation
    Inventors: Alan I. Alpert, Paul G. Greenstein, John T. Rodell, Ramanathan Raghayan
  • Patent number: 5528761
    Abstract: Upon requesting message passing in a multiprocessing system, a requesting processor sends a request to a set of the other processors in the multiprocessor system. The number of processors in a subset of the set of other processors is defined by an upper limit UNR and a lower limit LNR. A counter in the requesting processor counts acknowledgement signals from the other destination processors, and a comparator compares the count value of the counter with the lower and higher limit values. If the count value is not less than the lower limit value, the requesting processor performs message passing by sending a message to a number of destination processors up to the value of the upper limit.
    Type: Grant
    Filed: June 16, 1993
    Date of Patent: June 18, 1996
    Assignee: International Business Machines Corporation
    Inventors: Nobuyuki Ooba, Kiyokuni Kawachiya
  • Patent number: 5524082
    Abstract: A method is provided to remove redundancies in multi-level logic networks caused by reconverging signals at Boolean sum and product nodes. Generally, sum and product nodes which have potential redundancies are first identified. For each reconvergent signal at each of the nodes, it is determined whether it introduces redundancies using nondestructive Boolean analysis. No two-level expansion is made of the logic network. Moreover, for each confirmed redundancy, a redundant term is identified using Boolean analysis. Finally, the redundancy is removed, if desirable.
    Type: Grant
    Filed: June 28, 1991
    Date of Patent: June 4, 1996
    Assignee: International Business Machines Corporation
    Inventors: Paul W. Horstmann, Thomas E. Rosser, Prashant S. Sawkar
  • Patent number: 5521709
    Abstract: A method and apparatus is provided for producing single width barcodes in a continuous, serpentine pattern. This pattern provides continuity of operation for laser marking instruments and thereby results in the formation of more uniform and higher quality barcode indicia. The use of a continuous serpentine pattern also increases the speed at which the code may be written onto a substrate. This marking method is particularly appropriate for use in marking a wide variety of materials including semiconductors, metals, plastics and ceramics.
    Type: Grant
    Filed: May 5, 1993
    Date of Patent: May 28, 1996
    Assignee: International Business Machines Corporation
    Inventors: Douglas C. Bossen, Chin-Long Chen, Fuad E. Doany, Mu-Yue Hsiao, Ricky A. Rand, Ralf J. Terbruggen
  • Patent number: 5519600
    Abstract: In a delta-connected power supply system, phase switching circuits are employed and are activated during the failure of one of N+1 converter units. This activation is employed even though there has been no outage in any one of the input phases. The result is two operating converters running in effect as three-phase converters. Since each of the converters then acts as a full wave three-phase bridge with a resistor load, the line currents are perfectly balanced although unity power factor is not maintained during this non-normal mode of operation. In such circumstances, higher power factor is temporarily sacrificed to achieve continuous operation and therefore higher overall system reliability.
    Type: Grant
    Filed: March 31, 1995
    Date of Patent: May 21, 1996
    Assignee: International Business Machines Corporation
    Inventor: Steven J. Ahladas
  • Patent number: 5499311
    Abstract: A fiber optic receptacle for connecting standard fiber optic cable plug connectors with a multi-chip circuit module includes a surrounding non-insulative jacket having a thermal expansion joint. The jacket is preferably disposed in a recess along the edge of the multi-chip module substrate and is affixed thereto by means of solder ball technology so as to provide alignment and connection to grounding conductors. Internal fiber optic cables extend from the bottom of a recess in a receiving body which is surrounded by the non-insulative jacket. These internal optical fibers are coupled to fiber optic cables in an external plug connector with photonic receptors being present on selected circuit chips disposed on the multi-chip module structure. The connector structure solves problems of alignment, manufacturability, thermal expansion, bandwidth and compatibility in addition to problems associated with the dissipation of accumulated static charge.
    Type: Grant
    Filed: December 16, 1994
    Date of Patent: March 12, 1996
    Assignee: International Business Machines Corporation
    Inventor: Casimer M. DeCusatis
  • Patent number: 5490153
    Abstract: A system and method for asynchronously transmitting data across fibers in a serial manner. Frames are provided as a mechanism to transmit associated data serially and tie the data being transmitted to a particular buffer set. Each buffer set maintains a state that keeps track of the progress and sequence of received frames. When transmission errors occur in the frames, the errors may affect header bits in the frame that identify the buffer set and the frame type. In this case, the entire frame is lost and the operation usually results in a timeout of the operation. By using this state information some of these lost frames can be recovered avoiding the lengthier timeout recovery procedure.
    Type: Grant
    Filed: August 4, 1994
    Date of Patent: February 6, 1996
    Assignee: International Business Machines Corporation
    Inventors: Thomas A. Gregg, Joseph M. Hoke, Albert Ing, Chin Lee
  • Patent number: 5490152
    Abstract: A system and method for asynchronously transmitting data across fibers in a serial manner. Frames are provided as a mechanism to transmit associated data serially and tie the data being transmitted to a particular buffer set. Each outstanding request for each buffer set is individually timed to detect lost frames, and each buffer set maintains a state that keeps track of the progress and sequence of received frames. When transmission errors occur in the frames, the errors may affect only the information field and there is enough information in the header to identify the frame. A request can then be sent back to the other end of the fibers to retransmit the frame. In some instances, the frame cannot be retransmitted because the content of the data may have been changed by other operations in the systems. To speed recovery in these situations, the requester of the retransmitted frame sets a much shorter timer while waiting for the response since the retransmitted frame will be sent quickly, if at all.
    Type: Grant
    Filed: August 4, 1994
    Date of Patent: February 6, 1996
    Assignee: International Business Machines Corporation
    Inventors: Thomas A. Gregg, Joseph M. Hoke, Albert Ing, Chin Lee
  • Patent number: 5487147
    Abstract: The syntactic definition of a grammar for language statements is the basis for a method for automatically generating error messages and error recovery for the language statements. The grammar is used to produce a parser, an error message generator, and error recovery for the language statements. The error message generator is produced automatically along with a parser and provides an indication of alternative valid input symbols. The method also produces the automatic generation of expected symbols lists to achieve error message generation goals. The error recovery routines are also produced automatically along with a parser and provide an indication of where valid parsing continues in the event of error detection in the language statements. The method also uses the dynamic generation of sets of synchronization symbols to achieve error recovery goals.
    Type: Grant
    Filed: September 5, 1991
    Date of Patent: January 23, 1996
    Assignee: International Business Machines Corporation
    Inventor: James P. Brisson
  • Patent number: 5482113
    Abstract: A heat exchanger, especially for use in conjunction with a wide range of computer systems ranging from work stations to massively parallel processors is employable with both air and water cooling systems. In particular, a heat exchanger is provided which is convertible from a heat sink modality to an air cooling modality and finally to a liquid cooling modality in response to either increased performance demands or an increase in the number of processors or circuit components employed. The conversion may be carried out in the field and provides a flexible and less costly upgradeability path for data processing customers.
    Type: Grant
    Filed: August 25, 1993
    Date of Patent: January 9, 1996
    Assignee: International Business Machines Corporation
    Inventors: Dereje Agonafer, Timothy M. Anderson, Gregory M. Chrysler, Richard C. Chu, Robert E. Simons, David T. Vader
  • Patent number: 5473773
    Abstract: A workload manager creates goal control data, defining two or more classes of system work units, in response to specification of goals of two or more goal types for the classes, and specification of importance values for each of the goal types. A system resource manager causes the goals to be met by periodically sampling work unit status; calculating a performance index for each class; selecting a receiver class to receive improved service based on the relative performance indexes and goal importance; a system bottleneck impacting achievement of goal by the receiver class is identified; and one or more system control data elements are identified and adjusted to cause the goal to be met for the receiver class.
    Type: Grant
    Filed: April 4, 1994
    Date of Patent: December 5, 1995
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey D. Aman, Catherine K. Eilert, Gary M. King, Bernard R. Pierce, Peter B. Yocom
  • Patent number: 5463872
    Abstract: A device and method for cryogenic cooling of electronic components. A mixture of a first non-condensible gas and a second condensible gas is provided within an insulative housing. The non-condensible gas mixture has a partial pressure equal to the desired saturation pressure of the condensible gas. The insulative housing also includes an immersion chamber for housing electronic components. The immersion chamber preferably comprises two retainer parts and provides an module retainer top and a lower coldplate retainer bottom. The module retainer top allows gas to pass through the module retainer portion freely. The condensible gas is then turned into liquid form by a provided condensing means. The condensed liquid thus forms and collects inside the immersion chamber against the coldplate retainer bottom to cool the electronic components placed within. The non-condensible gas permits the condensed liquid to be subcooled.
    Type: Grant
    Filed: September 8, 1994
    Date of Patent: November 7, 1995
    Assignee: International Business Machines Corporation
    Inventors: David T. Vader, Vincent C. Vasile
  • Patent number: D363708
    Type: Grant
    Filed: May 10, 1994
    Date of Patent: October 31, 1995
    Assignee: International Business Machines Corporation
    Inventors: Edward Furey, Marian H. Gravel, Susan S. Moffatt, Gerard F. Muenkel, Thomas A. Parkin
  • Patent number: D369787
    Type: Grant
    Filed: July 25, 1995
    Date of Patent: May 14, 1996
    Assignee: International Business machines Corporation
    Inventor: Gerard F. Muenkel
  • Patent number: D370468
    Type: Grant
    Filed: July 25, 1995
    Date of Patent: June 4, 1996
    Assignee: International Business Machines Corporation
    Inventors: Susan S. Moffatt, Gerard F. Muenkel