Patents Represented by Attorney, Agent or Law Firm Leanne J. Fitzgerald, Esq.
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Patent number: 6311256Abstract: The invention relates to a method and apparatus for reordering, at a disk drive controller, a received sequence of read and write commands. The reordering can be system driven so that the system, when a command stalls, examines the command queue for another command to execute. Alternatively, the command queue itself can be reordered depending upon the expected time it takes for various commands to execute. Reordered commands can be flagged so that they cannot be reordered again. The resulting increase in throughput and efficiency occurs without reference to the particular disk drive or disk drive array configuration to which the controller is connected.Type: GrantFiled: June 30, 1997Date of Patent: October 30, 2001Assignee: EMC CorporationInventors: Kenneth A. Halligan, Erez Ofer, John T. Fitzgerald
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Patent number: 6076126Abstract: A shared resource lock mechanism is provided which enables processors in a mullet-processor environment which each share common resources to obtain locks on those resources using a read modify write type transaction which does not at any point in time require the locking of a bus or a memory which contains the lock records used to lock the particular resources.Type: GrantFiled: June 30, 1997Date of Patent: June 13, 2000Assignee: EMC CorporationInventor: Eli Shagam
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Patent number: 6049850Abstract: A cache management system and method monitors and controls the contents of cache memory coupled to at least one longer term data storage device. Cache memory is organized into at least first and second sections, the first section for storing data waiting to be written to a longer term data storage device and the second section for storing data elements which have been written to the longer term data storage device. The cache management system and method monitors data elements awaiting writing to the longer term data storage device.Type: GrantFiled: May 27, 1997Date of Patent: April 11, 2000Assignee: EMC CorporationInventors: Natan Vishlitzky, Haim Kopylovitz
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Patent number: 6035375Abstract: A cache management system and method monitors and controls the contents of cache memory coupled to at least one host and at least one data storage device. A cache indexer maintains a current index of data elements which are stored in cache memory. A sequential data access indicator, responsive to the cache index and to a user selectable sequential data access threshold, determines that a sequential data access is in progress for a given process and provides an indication of the same. The system and method allocate a micro-cache memory to any process performing a sequential data access. In response to the indication of a sequential data access in progress and to a user selectable maximum number of data elements to be prefetched, a data retrieval requestor requests retrieval of up to the selected maximum number of data elements from a data storage device. A user selectable number of sequential data elements determines when previously used micro-cache memory locations will be overwritten.Type: GrantFiled: July 15, 1996Date of Patent: March 7, 2000Assignee: EMC CorporationInventors: Moshe Yanai, Natan Vishlitzky, Bruno Alterescu, Daniel Castel
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Patent number: 6021436Abstract: A method for polling a plurality heterogeneous computer systems remote from a host is provided. The method has the host containing first and second memory locations. In the first location the current day's collected information is stored. In a second location historical data compiled over a predetermined period of time is stored. The system has the host initially polling all of the plurality of heterogeneous computer systems concurrently to determine if they are active. If it is determined that a particular computer system is active, the system then runs through a series of commands to obtain desired information from the plurality of hosts. The host obtains the particular operating system and the particular version of each operating system that is running on each one of the plurality of heterogeneous computers. Once this information is obtained the host then can run certain specific commands for each particular operating system revision to ascertain additional information.Type: GrantFiled: May 9, 1997Date of Patent: February 1, 2000Assignee: EMC CorporationInventor: Brian Garrett
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Apparatus and method for capturing information off a plurality of bi-directional communication buses
Patent number: 6018809Abstract: An apparatus for capturing data transmitted over of a plurality of bidirectional communication buses is provided. The apparatus comprises a plurality of trace engines, each trace engine having a trace analyzer and a central processing unit connected together with a bus. Each one of the trace engines is connected to another trace engine, so that all of the trace analyzers within the trace engines are synchronized to a common clock. The synchronization to a single common clock allows all of the data captured by the plurality of trace engines to be analyzed or used together.Type: GrantFiled: March 28, 1997Date of Patent: January 25, 2000Inventor: Brian Garrett -
Patent number: 6009481Abstract: A mass storage system having at least one input/output controllers in connection with a host computer is disclosed. The mass storage system also includes mirrored storage devices in connection with the input/output controllers through a global cache memory. Each mirrored pair of storage devices is assigned a common logical volume address, but is looked upon by the host computer as a single entity. The cache memory includes dynamically allocable cache slots, which correspond to each common logical volume address. When the host wishes to write data to a pair of mirrored storage devices, the contents of first write operation are written into the appropriate cache slot. However, when a second write operation is received by the input/output controllers, a determination is made as to whether the contents of the second write operation are already in the cache memory.Type: GrantFiled: September 30, 1996Date of Patent: December 28, 1999Assignee: EMC CorporationInventor: Robert Mayer
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Patent number: 5987550Abstract: A shared resource lock mechanism is provided which enables processors in a multi-processor system which each share common resources to obtain locks on those resources using a transactions which minimizes the amount of time system resources are unavailable, while also allowing system resources to be available for other processing tasks.Type: GrantFiled: June 30, 1998Date of Patent: November 16, 1999Assignee: EMC CorporationInventor: Eli Shagam
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Patent number: 5935260Abstract: A method of providing error to a host computer coupled to a storage system is provided. The method includes modifying a command in the storage system/computer communications protocol. The command, when received by a controller within the storage system is interpreted as being a modified command. The controller is responsive to the modified command for reading error information from its stored location within the storage system. The error information is then returned to the requesting host computer. Thus, previously unavailable error information is made available host computers coupled to the storage system without the need to add commands to the standard communications protocol.Type: GrantFiled: May 2, 1997Date of Patent: August 10, 1999Assignee: EMC CorporationInventor: Erez Ofer
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Patent number: 5903913Abstract: A method of managing a storage system is provided which allows each host of connected to a storage system supporting multiple hosts to view the identification information assigned to the storage devices by the respective hosts. The method includes providing a command which allows a host to write identification information to an area on the disk drives controlled by the host which was previously reserved for use by the storage system. In addition to writing the data to the physical storage device, execution of the command also causes the identification information to be written to an area in global memory which holds information about each of the storage devices in the storage system. Since the information is stored in a global memory, each host my access the information. Using a second command provided, any host may read the information in global memory and thus learn the identification assigned by other hosts.Type: GrantFiled: December 20, 1996Date of Patent: May 11, 1999Assignee: EMC CorporationInventors: Erez Ofer, Kenneth A. Halligan
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Patent number: 5822513Abstract: A method and apparatus are provided for detecting stale write data bugs associated with storage systems. The detection is accomplished by choosing a data pattern signature for each block of a storage device to be tested. The data pattern signature is then stored in a write log table which provides an index as to the data pattern signature associated with each block. Then, the block is filled by writing, in a repeating fashion, the data pattern signature until all bytes of the block have been written. At a later time, the entire block is read from the storage device. Once read, each byte retrieved is compared against the value of the data pattern signature currently stored in the write log for that block. If a mismatch is detected, then the error is reported and stored in a error log so that the bug may be eliminated.Type: GrantFiled: September 27, 1996Date of Patent: October 13, 1998Assignee: EMC CorporationInventors: Erez Ofer, Brian L. Garrett
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Patent number: 5785550Abstract: Two data communication channels having electrical ground positions that alternate with control and data positions are terminated in a single, dual-channel connector that occupies generally the same interconnection board real estate as is required for a single, prior art, data communication SI connector, such as for a Small Computer System Interface (SCSI) communication channels. A two-channel SCSI connector system and connection method includes providing a two-channel header having two ground buses, to which the alternating electrical ground wires of respective first and second SCSI channels are terminated. Only a few of the pins or positions of the two-channel connector are connected to the two ground buses while the majority of pins or positions are connected to the signal (control, data) wires of the two SCSI channels.Type: GrantFiled: July 25, 1994Date of Patent: July 28, 1998Inventors: Eli Leshem, Daniel Castel
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Patent number: 5787473Abstract: A shared system memory buffers data transfers between a plurality of host computers and a plurality of data storage devices. The system memory includes a cache memory and a number of queues and structures to facilitate performance. Management of a replacement queue within the system memory is based on the elapsed time and usage of the data element. If the elapsed time of a data element to be updated is less than a threshold, the data element will remain in the same location of the replacement queue; if the elapsed time is greater than the threshold, the data element is placed at the tail of the replacement queue. The threshold may be determined by dynamically monitoring the stress of the cache memory. The updating of the replacement queue is also affected by the number of times the data element has been accessed while in the replacement queue. The memory also includes a pending write data structure which is not part of the replacement queue.Type: GrantFiled: September 20, 1996Date of Patent: July 28, 1998Assignee: EMC CorporationInventors: Natan Vishlitzky, Yuval Ofek
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Patent number: 5765213Abstract: A method of prefetching data from the storage media of a data storage system, in which the data is stored on, and read from, the storage media in individually-accessible data storage portions, such as tracks of a hard disk. A number of immediately past-read data storage portions are used to predict a storage portion or portions that will likely be requested in the future. The unique identifiers of those previously-read data storage portions are determined, and a prediction coefficient is calculated for each unique identifier. The prediction coefficient is then multiplied by the unique identifier, and the results are summed to determine the unique identifier of a data portion to be prefetched.Type: GrantFiled: December 8, 1995Date of Patent: June 9, 1998Assignee: EMC CorporationInventor: Erez Ofer
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Patent number: 5761717Abstract: A cache management system and method monitors and controls the contents of cache memory. A time indication provider provides a time indication signal to a cache indexer, for maintaining a cache index which are stored in cache as well as an indication that a data element must be written to a longer term data storage device. A cache manager is responsible for placing data elements into and removing data elements from the cache memory. The cache manager is responsive to at least one data element stored in cache which must be written to a longer term data storage device, and to the associated time indication, for determining the amount of time that the data element has been stored in cache as well as the average period of time that elapses between a data element being inserted in cache and being removed from cache.Type: GrantFiled: April 26, 1996Date of Patent: June 2, 1998Assignee: EMC CorporationInventors: Natan Vishlitzky, Haim Kopylovitz
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Patent number: D389809Type: GrantFiled: September 26, 1996Date of Patent: January 27, 1998Assignee: EMC CorporationInventor: Paul T. Tirrell
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Patent number: D405767Type: GrantFiled: December 30, 1997Date of Patent: February 16, 1999Assignee: EMC CorporationInventors: Erik Nelson, Jeffrey Teachout