Abstract: A stacked map storage system has a base mapping of logical data to physical locations in the storage system. Level maps are created either as positive or negative maps of a lower level map. A positive map enables an alternate view while keeping the next lowest level map the same. A negative map allows changes to a lower level map but stores references to the data in itself so the negative map becomes a backup. Negative maps freeze storage in themselves and are read-only. A positive map allows changes to itself and can be used by applications under test to make changes, while not allowing changes to the next lower level map to be made through the positive map. In a preferred embodiment, maps can be stacked to any number of levels, can be shared by applications and hosts, and can either be deleted or merged. Deletion removes the map as though it never existed. A merge overlays an upper view onto a lower view and thus changes the lower view to match the other's state.

Abstract: A method of dynamically reconfiguring the logical devices in a storage system is provided. The method allows a logical devices to be added, removed, or repositioned without requiring the storage system to be taken off-line. The method includes manipulating the request queues associated with host controllers within the storage system. The request queues associated with each logical device may be repositioned in the request queue memory in order to make room for new logical devices or to take advantage of free space associated with a removed logical device. The storage system communicates with the host computer in order to manage the reconfiguration of the request queues while still providing storage services to the host computer.

Abstract: A digital computer system comprises a mass storage subsystem and an “open systems” computer system. The mass storage subsystem includes a storage device for storing data and an access control for performing an access operation in connection with the storage device in response to a channel program received thereby in at least one channel program information transfer packet. The channel program includes at least one channel command and the supplementary channel command processing information useful in processing the at least one channel command. The “open systems” computer system performs processing operations in response to programs.

Abstract: An address triggered DMA controller includes a DMA engine for controlling transfer of data between an external device and locations in a memory designated by respective addresses. Such a DMA controller also includes a DMA monitor for monitoring the respective addresses, and if one of the respective addresses matches a predetermined value, generating a signal to indicate a match.

Abstract: A method of managing shared storage system resources amongst a plurality of heterogeneous host computers utilizing different operating systems is described. The method includes providing a lock mechanism which allows a host to gain exclusive control of storage system resources, including storage devices.

Abstract: A clock distribution system in a reliable electronic system includes a predetermined number of clock signal load circuits, each having a clock signal input terminal. A first clock signal generator has the same predetermined number of clock signal output terminals coupled to the clock signal input terminals of the clock signal load circuits. A second clock signal generator also has the same predetermined number of clock signal output terminals which are also coupled to the clock signal input terminals of the clock signal load circuits.

Abstract: A shared resource lock mechanism is provided which enables processors in a multi-processor environment which each share common resources to obtain locks on those resources. The lock mechanism also includes a reserve feature which provides a mechanism for a processor to maintain a lock on a resource for several input/output cycles. The lock mechanism combines the lock feature and the reserve feature in a single structure. This combination allows a processor to manipulate both the lock data and reserve data in a single transaction. Thus, in transactions requiring manipulation of both the lock and reserve elements, overhead is significantly reduced. In addition a unification of software routines which manipulate the lock and reserve data is achieved.

Abstract: A shared resource lock mechanism is provided which enables processors in a mullet-processor environment which each share common resources to obtain locks on those resources using a read modify write type transaction which does not at any point in time require the locking of a bus or a memory which contains the lock records used to lock the particular resources.

Abstract: A method of improving the performance of a storage system is provided. The method includes sending a pre-request to a logical device before data associated with the previous request is transferred from a cache to the requesting host device. Additionally, while a host controller of the storage system is transferring data from the cache to the requesting host, it will also check to see if any other requests are entered in a request queue for that logical device. To do this, the host controller checks a status flag in a mailbox location within the host controller. A disk controller is also responsive to the placement of requests in the mailbox location and can set the status flag upon a completion of a data transaction. If there has been an entry, a pre-request will be sent to the logical device while the data from the previous request is being transferred to the host.

Abstract: A cache management system and method monitors and controls the contents of cache memory coupled to at least one longer term data storage device. Cache memory is organized into at least first and second sections, the first section for storing data waiting to be written to a longer term data storage device and the second section for storing data elements which have been written to the longer term data storage device. The cache management system and method monitors data elements awaiting writing to the longer term data storage device.

Abstract: A cache management system and method monitors and controls the contents of cache memory coupled to at least one host and at least one data storage device. A cache indexer maintains a current index of data elements which are stored in cache memory. A sequential data access indicator, responsive to the cache index and to a user selectable sequential data access threshold, determines that a sequential data access is in progress for a given process and provides an indication of the same. The system and method allocate a micro-cache memory to any process performing a sequential data access. In response to the indication of a sequential data access in progress and to a user selectable maximum number of data elements to be prefetched, a data retrieval requestor requests retrieval of up to the selected maximum number of data elements from a data storage device. A user selectable number of sequential data elements determines when previously used micro-cache memory locations will be overwritten.

Abstract: A method for polling a plurality heterogeneous computer systems remote from a host is provided. The method has the host containing first and second memory locations. In the first location the current day's collected information is stored. In a second location historical data compiled over a predetermined period of time is stored. The system has the host initially polling all of the plurality of heterogeneous computer systems concurrently to determine if they are active. If it is determined that a particular computer system is active, the system then runs through a series of commands to obtain desired information from the plurality of hosts. The host obtains the particular operating system and the particular version of each operating system that is running on each one of the plurality of heterogeneous computers. Once this information is obtained the host then can run certain specific commands for each particular operating system revision to ascertain additional information.

Abstract: An apparatus for capturing data transmitted over of a plurality of bidirectional communication buses is provided. The apparatus comprises a plurality of trace engines, each trace engine having a trace analyzer and a central processing unit connected together with a bus. Each one of the trace engines is connected to another trace engine, so that all of the trace analyzers within the trace engines are synchronized to a common clock. The synchronization to a single common clock allows all of the data captured by the plurality of trace engines to be analyzed or used together.

Abstract: A mass storage system having at least one input/output controllers in connection with a host computer is disclosed. The mass storage system also includes mirrored storage devices in connection with the input/output controllers through a global cache memory. Each mirrored pair of storage devices is assigned a common logical volume address, but is looked upon by the host computer as a single entity. The cache memory includes dynamically allocable cache slots, which correspond to each common logical volume address. When the host wishes to write data to a pair of mirrored storage devices, the contents of first write operation are written into the appropriate cache slot. However, when a second write operation is received by the input/output controllers, a determination is made as to whether the contents of the second write operation are already in the cache memory.

Abstract: A shared resource lock mechanism is provided which enables processors in a multi-processor system which each share common resources to obtain locks on those resources using a transactions which minimizes the amount of time system resources are unavailable, while also allowing system resources to be available for other processing tasks.

Abstract: A method of providing error to a host computer coupled to a storage system is provided. The method includes modifying a command in the storage system/computer communications protocol. The command, when received by a controller within the storage system is interpreted as being a modified command. The controller is responsive to the modified command for reading error information from its stored location within the storage system. The error information is then returned to the requesting host computer. Thus, previously unavailable error information is made available host computers coupled to the storage system without the need to add commands to the standard communications protocol.

Abstract: A method of managing a storage system is provided which allows each host of connected to a storage system supporting multiple hosts to view the identification information assigned to the storage devices by the respective hosts. The method includes providing a command which allows a host to write identification information to an area on the disk drives controlled by the host which was previously reserved for use by the storage system. In addition to writing the data to the physical storage device, execution of the command also causes the identification information to be written to an area in global memory which holds information about each of the storage devices in the storage system. Since the information is stored in a global memory, each host my access the information. Using a second command provided, any host may read the information in global memory and thus learn the identification assigned by other hosts.

Abstract: A method and apparatus are provided for detecting stale write data bugs associated with storage systems. The detection is accomplished by choosing a data pattern signature for each block of a storage device to be tested. The data pattern signature is then stored in a write log table which provides an index as to the data pattern signature associated with each block. Then, the block is filled by writing, in a repeating fashion, the data pattern signature until all bytes of the block have been written. At a later time, the entire block is read from the storage device. Once read, each byte retrieved is compared against the value of the data pattern signature currently stored in the write log for that block. If a mismatch is detected, then the error is reported and stored in a error log so that the bug may be eliminated.

Abstract: A reduce cross-talk wiring harness and method for accomplishing same. The wiring harness is used for routing signals from a bus and tag housing to a controller, and for routing signals back from the controller to terminators in the bus and tag housing. The harness includes an input pair and an output pair of bus and tag ribbon cables. The cables in each pair are of essentially the same length. Each pair has a combined bus and tag connector attached to one end, and individual bus and tag connectors attached to the other end. The input and output bus and tag ribbon cables are grouped together for at least part of the distance between the controller and the bus and tag housing in such a manner that at least one of both bus cables or both tag cables are adjacent one another, to reduce cross-talk between the bus cable of one cable pair and the tag cable of the other cable pair.