Abstract: A semiconductor device including a plurality of decoupling capacitors formed on a semiconductor substrate, and a plurality of decoupling capacitor contact plugs disposed between the semiconductor substrate and the plurality of decoupling capacitors, the plurality of decoupling capacitor contact plugs being electrically connected to the plurality of decoupling capacitors and including an array of first decoupling capacitor contact plugs and second decoupling capacitor contact plugs.

Abstract: A display for a keypad and an electronic device including the display that can improve a user interface environment and stability of input in which the display for the keypad includes: a display panel having a first display region and second display regions; a circuit board disposed on the display panel and including a first opening corresponding to the first display region, second openings corresponding to the second display regions, and keys formed adjacent to the second openings; a touch panel, formed in the first display region in a shape corresponding to the first display region and arranged to fill the first opening; and a pad disposed on the circuit board and including pressing units formed to correspond to the keys.

Abstract: A semiconductor device includes a comparator, an internal voltage generator, a control signal generator, and a selector. The comparator may compare a reference voltage to an internal voltage and output a comparison signal. The internal voltage generator may generate and output the internal voltage in response to the comparison signal. The control signal generator may generate a control signal. The selector may receive first and second target voltages, and select and output one of the first and second target voltages as the reference voltage in response to the control signal.

Abstract: A universal frame for connecting a semiconductor device to a test device, the universal frame including a connector for establishing a connection between the semiconductor device and the test device; a head part fixing a position of the connector; a body part fixing a position of the head part, the body part being configured to accommodate the semiconductor device; and a guide unit within the body part, the guide unit being configured to receive the semiconductor device at an end of the body part opposite to an end of the body part fixing the position of head part, and being configured to accommodate the semiconductor device

Abstract: A memory device includes a MOS transistor including a gate structure, a first impurity region, a second impurity region, and a floating body positioned between the first and the second impurity regions on a semiconductor substrate including a buried oxide layer. The memory device includes a charge storage structure of the non-volatile memory device electrically connected to the second impurity region of the MOS transistor.

Abstract: A burst address generator includes a burst bit counter for receiving at least one burst bit, and increasing or decreasing the at least one burst bit, a burst bit splitter for receiving the increased or decreased at least one burst bit from the burst bit counter, and dividing the increased or decreased at least one burst bit into an X burst bit and a Y burst bit, and a selector for receiving an X address, a Y address, the X burst bit, and the Y burst bit, and generating an X burst address based on the X address and the X burst bit and a Y burst address based on the Y address and the Y burst bit.

Abstract: An apparatus for testing an electrical property of a semiconductor device includes a substrate support unit, a tester head above the substrate support unit, the tester head including a base, a probe card connected to the base of the tester head, and a temperature control unit within the base of the tester head, the temperature control unit being configured to control temperature of the probe card by heat transfer with the probe card.

Abstract: A method of forming a pattern and a photoresist composition, the method including forming a photoresist film on a substrate by coating a photoresist composition thereon, the photoresist composition including a polymerized photoresist additive, a polymer including an acid-labile protective group at a side chain, a photoacid generator, and a solvent; exposing the photoresist film; and forming a photoresist pattern by developing the photoresist film using an aqueous alkali developer, wherein the polymerized photoresist additive includes a hydrophilic repeating unit having an aliphatic hydrocarbon backbone and a side chain containing an oxygen heteroatom in a heterocyclic ring substituted with at least three hydroxyl groups, and a hydrophobic repeating unit having an aliphatic hydrocarbon backbone and a side chain containing a fluorinated aliphatic hydrocarbon group.

Abstract: A material for an organic photoelectric device, the material including a compound including a pyridine moiety, the compound being a bipolar organic compound including both a hole transporting unit and an electron transporting unit, the compound being represented by the following Formula 1:

Abstract: A phase-change memory device and its firing method are provided. The firing method of the phase-change memory device includes applying a writing current to phase-change memory cells, identifying a state of the phase-change memory cells after applying the writing current, and applying a firing current, in which an additional current is added to the writing current, to the phase-change memory cells in accordance with the state.

Abstract: Provided are a heat recovery apparatus recovering heat generated from a membrane electrode assembly (MEA) and transmitting the heat to a fuel spreader so that a temperature difference between the MEA and the fuel spreader inside a fuel cell is reduced, and a fuel cell having the heat recovery apparatus. The fuel spreader supplies fuel having a uniform concentration to the MEA through the heat recovery apparatus, so that a fuel cell having a reduced total volume, a stable performance, and increased energy efficiency can be provided.

Abstract: A method and apparatus for tuning a phase of a data clock signal having a different frequency than a main clock signal. The method of tuning includes coarse tuning by receiving the data clock signal, dividing the data clock signal to generate a frequency-divided clock signal having a same frequency as the main clock signal, repeatedly shifting the frequency-divided clock signal to generate multiphase frequency-divided clock signals at a predetermined phase interval, comparing a phase of each of the multiphase frequency-divided clock signals with a phase of the main clock signal, and determining a phase shift amount based on a comparison result, and fine tuning by comparing a phase of a multiphase frequency-divided clock signal corresponding to the phase shift amount with the phase of the main clock signal and adjusting the phase of the data clock signal by a predetermined phase step based on the comparison result.

Abstract: A method of forming an ion implantation mask includes forming a field area on a semiconductor substrate, forming an amorphous carbon layer on the semiconductor substrate, forming a hard mask layer on the amorphous carbon layer, forming an etching mask pattern on the hard mask layer, and etching the hard mask layer and the amorphous carbon layer to expose the field area through the etching mask pattern, wherein etching the hard mask layer and the amorphous carbon layer forms a hard mask layer pattern and an amorphous carbon layer pattern.

Abstract: A pixel circuit includes first, second, and third transistors, and first and second capacitors, wherein the first transistor is controlled by a scan line and is configured to controllably couple a data line to the first capacitor and a gate electrode of the second transistor, the second transistor is controlled by a voltage provided by the first and second capacitors, the third transistor is controlled by the scan line and is configured to controllably couple a first power supply to the second capacitor, and the first power supply is controllably coupled to a light source by the second transistor.

Abstract: A photocationically polymerizable adhesive composition and an optical member, the photocationically polymerizable adhesive composition including about 75 to about 99.8 parts by weight of a compound including one of aliphatic epoxy, alicyclic epoxy, oxetane, and vinyl ether compounds, about 0.1 to about 5 parts by weight of a titanate coupling agent, and about 0.1 to about 20 parts by weight of a photopolymerization initiator, wherein a sum of weights of the compound, the titanate coupling agent, and the photopolymerization initiator is 100 parts by weight.

Abstract: Provided is a method for fabricating a nonvolatile memory device capable of improving charge retention characteristics. The method for fabricating a nonvolatile memory device includes forming a charge trapping layer with a memory region and a charge blocking region on a semiconductor substrate, and trapping charges in the charge blocking region of the charge trapping layer.

Abstract: A sub-mount adapted for AC and DC operation of devices mountable thereon, light emitting devices including such a sub-mount, and methods of manufacturing such a sub-mount are provided. The sub-mount including a base substrate including a first surface and a second surface different from the first surface, a conductive pattern on the first surface, a first pair and a second pair of first and second electrodes on the second surface, and vias extending through the base substrate between the first and second surfaces, wherein the conductive pattern includes a first set of mounting portions and two via portions along a first electrical path between the first pair of first and second electrodes, and a second set of mounting portions and two via portions along a second electrical path between the second pair of first and second electrodes, the via portions connecting respective portions of the conductive pattern to respective electrodes of the first and second pair of first and second electrodes through the vias.

Abstract: An organic light emitting display including a scan signal line forwarding a scan signal, a data line sending a data signal and a pixel coupled to the scan signal line and the data line, the organic light emitting diode display, wherein the pixel includes a first switching transistor transmitting a data signal from the data line in response to the scan signal of the scan signal line, a driving transistor, coupled to the first switching transistor, controlling driving current from a first power source line, a storage capacitor coupled between the driving transistor and the first power source line, an organic light emitting diode, coupled between the driving transistor and a second power source line, displaying an image with the driving current controlled by the driving transistor, an initial switching transistor, coupled between the storage capacitor and an initial power source line, initializing the storage capacitor, and a switching transistor for applying a reverse bias, coupled between the second power sour

Abstract: An organic light emitting diode (OLED) display and a method of manufacturing the same, the OLED display including a flexible substrate, a driving circuit unit on the flexible substrate, the driving circuit unit including a thin film transistor (TFT), an organic light emission element on the flexible substrate, the organic light emission element being connected to the driving circuit unit, an encapsulating thin film on the flexible substrate, the encapsulating thin film covering the organic light emission element and the driving circuit unit, a first protection film facing the encapsulating thin film, a second protection film facing the flexible substrate, a first sealant disposed between the encapsulating thin film and the first protection film, and a second sealant disposed between the flexible substrate and the second protection film.

Abstract: An organic light emitting display device including a plurality of scan lines arranged in a first direction, a plurality of data lines arranged in a second direction, the plurality of data lines intersecting with the plurality of scan lines, and pixels respectively disposed at intersection portions of the scan and data lines, each pixel including at least one thin film transistor (TFT) and an organic light emitting diode, wherein the TFT is an oxide TFT, the oxide TFT including a first oxide semiconductor layer as an active layer, and a second oxide semiconductor layer is disposed between intersecting scan and data lines.