Abstract: A timer device includes a multiple bit storage circuit to store a numerical value as a series of binary bits and evaluation circuitry to simultaneously compare the value stored in the storage circuitry with a predetermined value. This invention further includes a counter circuit consisting of a multiple bit storage circuit to store an initial counter value, a counter circuit to receive the initial counter value and to decrement the counter in response to a clock signal and an evaluation circuit to produce an output when the counter value is identical to a circuit defined value.