Abstract: Apparatus for detecting a datum position in a range of movement of a movable member, comprises a composite grating comprising first and second gratings. The first grating has first and second grating halves and the second grating has third and fourth grating halves which are respectively identical to the first and second grating halves except that the third and fourth grating halves are separated by a spacing. The image of the third grating half is reflected upon the image of the first grating half, the image of the second grating half upon the fourth grating half, the first grating half upon the third grating half and the fourth grating half upon the second grating half. A quadrant detector detects the intensity of the interference images and provides a difference signal which passes through zero at the datum position of the member.

Abstract: In a flat housing (10) a stator (12) is concentrically arranged relative to an input shaft (16) supported in the housing (10). A rotor (14) is seated on the input shaft (16). A reducing gear (18) constructed as a play-free planetary gear is arranged within the flat housing (10) in an annular space (20) formed between the rotor (14) and the input shaft (16). The signal processing circuit is also accommodated in an annular space (60) within the housing (10). The input shaft (16) can be rotated through 360.degree. or more. During such rotation, the rotor (14) performs a rotational movement through a limited angle within which there is obtained a substantially linear angle signal due to the cooperation of the rotor (14) and the stator (12).

Abstract: A receiver for modulated optical signals including a multiport optical fibre coupler arrangement (10) to one input port of which the modulated optical signals are applied and to another input port of which a local oscillator optical signal of substantially the same optical frequency as the modulated optical signal is applied whereby the output ports of the coupler give separate output signals that are differentially related to the optical frequency phase difference between the modulated input signal and the local oscillator signal, means for individually demodulating (12a-12c) the output signals and means for summing the demodulated output signals.

Abstract: A sawn cavity single heterostructure laser chip is provided with secondary saw cuts to produce an inverted Tee shaped cross-section in order to limit the width of emission to less than the full width of the chip. The depth of the secondary cuts is arranged to terminate just short of the active region (3).

Abstract: A bit-line load for a static random access memory incorporates a load comprising a diode, and current limiting means in series with the diode, the diode/limiter assembly being shunted by a current source. This overcomes both the V.sub.dd drop problem and the high write cycle current flow experienced with conventional bit line loads.

Abstract: A digital integrated circuit is described in which the internal registers are organized into a number of serial shift paths to facilitate testing. Each path has a number of modes: USER, HOLD, SHIFT and SELF-TEST modes. These modes are controlled by shifting a control function into a control shift register. When the shifting of the control shift register stops, a command is automatically loaded from the control shift register (or another source) into a command register, which controls the serial shift paths. The provision of a separate command register allows a new control function to be shifted into the control shift register while a preceding command is still active in the command register.

Abstract: A ribbon cartridge for printing apparatus is provided selectively with a color selection mechanism, when the cartridge is loaded with a multi-color ribbon, operated by moving the printer-carriage to a position beyond the print line limit and with a peg arranged to engage a cam mechanism on the print carriage, when the cartridge is loaded with a single color ribbon, to enable the full width of the ribbon to be utilized. The peg is formed integrally with the cartridge and is removed when a multi color ribbon is to be loaded in the cartridge.

Abstract: A digital integrated circuit is described in which the internal registers are organized into a number of serial shift paths to facilitate testing. Each path has a number of modes; USER, HOLD, SHIFT and SELF-TEST modes. Shifting of a path is achieved by putting the path into HOLD mode and then, at each of a series of transfer pulses (TR), putting the path into shift mode for one clock beat. This allows the shifting to be performed at a lower rate than the internal clock rate of the chip; in particular, it can be performed at a rate compatible with a relatively slow diagnostic processor.

Abstract: A signal generating device and method of control thereof for producing a desired output frequency, the generator having coarse and fine tuning controls capable of producing frequency changes over a limited range, wherein the output of the device is combined in a mixing device with a multi-component reference signal produced from an oscillatory generator circuit, a beat signal is detected by processing circuitry as the frequency controls are adjusted and the values of the frequencies of the control signals occurring on such detection are stored, and using a look-up table or algorithm the value of a correction signal is determined which, when combined with the stored values, will cause the output frequency of the device to be adjusted to the desired value via the fine tuner.

Abstract: A method of addressing a matrix addressed ferroelectric liquid crystal cell is described that uses parallel entry of balanced bipolar data pulses on one set of electrodes to co-operate with serial entry of unipolar strobe pulses on the other set of electrodes. Data entry is preceded with blanking (erasing) pulses applied to the strobe lines. The polarity of the strobing and blanking pulses is periodically reversed to maintain charge balance in the long term.

Abstract: Data storage apparatus comprises a main store, for example a microprogram store, with an associated address generating circuit. In order to extend the capacity of the store, an additional store is provided, but because of physical limitations this is remote from the main store. To reduce delays in accessing data items from the additional store, a prediction circuit predicts the address of the next item to be required from the additional store and prefetches it. A control circuit checks whether the prefetched item is the correct one and, if it is not, causes a temporary hold-up in the operation of the address generation circuit to allow the correct data item to be fetched.

Abstract: The data processing terminal comprises a smectic liquid crystal flat panel display module (2) which is supported by a support module (1). The terminal also includes a keyboard (4). The display module (2) may be removed from the support module (1) and has its own central processor, memory, control means and power source to enable it to operate independently of the support module, which contains its own central processor, memory, control means, and interface means and is mains operated. The display module may incorporate a touch sensitive overlay to permit the manipulation of the contents of the display. The support unit may incorporate a telephone interface unit.

Abstract: A sequence generator for producing a sequence of binary numbers, comprises a counter, a priority encoder which encodes the contents of the counter, a memory addressed by the output of the encoder, an output register, and a logic circuit for modifying the contents of the output register as specified by the output from the memory. The generated sequence can readily be modified by changing the contents of the memory. The flexibility of the generator can be increased further by using as the counter a count register which is incremented by values from a further memory also addressed by the output of the encoder.

Abstract: In order to scan a rather large field of view quickly, the field of view is imaged, by an imaging optical system, in the plane of a detector having a substantially linear array of detector elements. The path of rays comprises a rotating optically refracting wedge for causing a nutating movement of the image and, coaxial therewith a rotating Dove prism for causing rotation of the image. The wedge and the Dove prism rotate at different rotary speeds.

Abstract: A simple radio receiver for FSK signals is described in which the signals from the aerial are mixed in two high-gain mixers respectively with local oscillator signals in phase quadrature and at the signals' nominal center frequency. The outputs from the mixers are low-pass filtered to get the difference frequencies. The filter outputs are amplified and one applied to the D input of a D-type flip-flop to the clock input of which the other is applied. The flip-flop output gives the FSK modulation. It is highly desirable that the local oscillator's outputs, called Io and Qo should be in accurate phase quadrature, and the circuit described herein is intended to achieve this. To do this, the Io and Qo signals are applied to a quadrature phase sensitive detector (10) which, if the phase relation is wrong, gives an error signal. This is applied to an adjustable phase shifter (12) in one of the oscillator outputs, in this case the Qo output. Alternatively, the phase adjustment can be applied to both Io and Qo lines.

Abstract: An arrangement for the demodulation of auxiliary low frequency channels in digital transmission systems comprising means (12) for receiving the transmitted signals, linear amplification means (13) with automatic gain control (AGC) (14) for the received signals, non linear discrimination means (15) for discriminating between logic levels in the amplified digital signals at the main channel bit rate, and subtraction means (16) for subtracting the output of the discrimination means from the amplified signals to obtain the auxiliary low frequency channel signals.

Abstract: A network provides communication between end units (1). Each end unit (1) received an entitlement to transmit in the form of a go-ahead. It is then able to transmit a frame of user data, which is broadcast by a central unit (7) to all other end units (1). When the end unit (1) transmitting the frame wishes to relinquish its entitlement to transmit it regenerats the go-ahead, which is passed by the central unit (7) to the next end unit (1) taking them in a predtermined cyclic sequence. The system allows frames to be acknowledged: the central unit (7) collects acknowledgements from end units (1) receiving the frame successfully, and when every expected station has acknowledged, returns an acknowledgement to the source end unit (1). Central units (1) may be combined to form larger systems.

Abstract: A disposal system particularly adapted for hospital use comprising two portions. The first portion is composed of a hollow, outer enclosure adapted for wall-mounting and including an elongated slot inlet at the top with a barrier adjacent the slot for restricting access to the interior of the enclosure. The enclosure also includes a hinged access door for permitting insertion of the second portion of the invention, an inner container, therewithin. The inner container includes an inlet formed in registration with the slot when installed within the enclosure. The inner container includes a pivotal closure which may be locked in place when full in order to prevent access to the contents of the container.

Abstract: Clearance arrangement for data storage apparatus. Data items D are entered into a store 10 together with a tag T equal to the current value of a counter 11. Data items are valid only while the counter 11 retains its current value. When it is desired to clear the store 10 the counter is incremented so that items with the previous tag value are rendered invalid. On some or all of such occasions a fraction of the store locations are also cleared by setting their tags to a null value. By the time the counter has completed a cycle all locations have been cleared in this way and cannot erroneously appear to contain valid data remaining from the previous cycle. The store is out of action to allow it to be cleared only for a relatively short time. Different tag counters may be used for different data types.

Abstract: A data processing apparatus, which includes a microprogram control unit for producing control signals for the apparatus. Each microinstruction contains a number of control bits, and an address field. The address field addresses a control memory so as to read out a control word. Each control word specifies the way in which the control signals are mapped on to the control bits of the microinstruction. The output of the control memory controls switching logic which connects the control bits to the specified control signal lines. This variable mapping of the control signals allows the control signals to be packed into any available space in the microinstruction, thus reducing the required number of bits in the microinstruction without any significant loss of flexibility. Certain critical control signals however are derived from fixed positions in the microinstruction so as to avoid delays. These critical control signals are confirmed by validity signals from the control memory.