Abstract: A field programmable gate array configured to use RAM control signals as routing and/or logic resources. By using RAM bit lines as routing, and/or to implement Wire-OR functions, and/or with word lines to implement PAL functions, one may increase the efficiency of lines normally used only for programming the control memory.

Abstract: In accordance with the present invention, a microprocessor controlled device is provided which appears to a user to be a programmable logic device. Signals are taken from and placed on external pins in the same manner as would be done with a prior art programmable logic device. However, internal hardware which would be provided in a programmable logic device for performing the logic function is replaced by a microprocessor with associated memory. The microprocessor is programmable to read input signals from input pins, perform calculations related to the desired logic, and place signals onto output pins. Thus the function of the microprocessor controlled device as it appears from observing signals on external pins is the same as that of a prior art FPGA or other logic device.