Patents Represented by Law Firm Limbach & Limbach
  • Patent number: 6183095
    Abstract: An all-reflective optical system for a projection photolithography camera has a source of EUV radiation, a wafer and a mask to be imaged on the wafer. The optical system includes a first concave mirror, a second mirror, a third convex mirror, a fourth concave mirror, a fifth convex mirror and a sixth concave mirror. The system is configured such that five of the six mirrors receives a chief ray at an incidence angle of less than substantially 12°, and each of the six mirrors receives a chief ray at an incidence angle of less than substantially 15°. Four of the six reflecting surfaces have an aspheric departure of less than substantially 7 &mgr;m. Five of the six reflecting surfaces have an aspheric departure of less than substantially 14 &mgr;m. Each of the six reflecting surfaces has an aspheric departure of less than 16.0 &mgr;m.
    Type: Grant
    Filed: December 2, 1999
    Date of Patent: February 6, 2001
    Inventor: Russell Hudyma
  • Patent number: 6184557
    Abstract: The n-channel and p-channel driver transistors of an I/O circuit are electrostatic discharge (ESD) protected by utilizing a pair of well structures that resistively delay an ESD event from reaching the driver transistors, and that form diodes that direct the ESD event to the supply rail or ground of the circuit.
    Type: Grant
    Filed: January 28, 1999
    Date of Patent: February 6, 2001
    Assignee: National Semiconductor Corporation
    Inventors: Pavel Poplevine, Alexander Kalnitsky, Hengyang (James) Lin, Albert Bergemont
  • Patent number: 6184668
    Abstract: A high-voltage sensing circuit is provided that inhibits or prevents a low-voltage from being inadvertently sensed as a high-voltage during power-up and power-down and triggering a high-voltage operation such as a chip erase. The high-voltage sensing circuit comprises a low-power supply sensing circuit for generating a control signal in response to the detection of a power supply level and a switch, controlled by the control signal, that receives the input voltage and passes an output voltage if the input voltage is greater than a reference voltage. Until the power supply exceeds a certain amount, a switching transistor will be OFF and VIN (the output of the charge pump) will not be high enough. Thus, a low-voltage is prevented from being inadvertently sensed by the high-voltage sensing circuit as a high-voltage and triggering a high-voltage operation such as a chip erase.
    Type: Grant
    Filed: June 22, 1999
    Date of Patent: February 6, 2001
    Inventors: Isao Nojima, Hung Nguyen
  • Patent number: 6184722
    Abstract: A latch-type sense amplifier receives a low level differential small swing input signal pair. The amplifier includes a pair of MOSFET switches of a first conductivity type each having a first source/drain terminal coupled to one of the input signal lines. The latch has a second pair of MOSFETs of the first conductivity type with its first source/drain terminal connected to the second source/drain terminal of one of the first pair of MOSFETs. Each of the second pair of MOSFETs has its first source/drain terminal connected to the first source/drain terminal of a third pair of MOSFETs of the second conductivity type. Each MOSFET of the second conductivity type has its second source/drain terminal connected to a first voltage source. The gate terminals of the second pair of MOSFETs are connected together to receive a control signal. The gate terminals of each of the third pair of MOSFETs are cross-coupled and connected to the second source/drain terminals of the first pair of MOSFETs.
    Type: Grant
    Filed: September 2, 1998
    Date of Patent: February 6, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shigeyuki Hayakawa
  • Patent number: 6185633
    Abstract: A descriptor controlled transmit and receive scatter/gather Direct Memory Access Controller efficiently moves data frames comprised of scattered blocks of data from within memory to a destination interface via a multibyte-wide buffer. The transfer of frames into a transmit buffer and out of a receive buffer is optimized regardless of the total length of the component data blocks and regardless of whether the data blocks include an odd or even number of bytes, whether the data blocks begin at an odd or even address, or whether the data blocks are misaligned with regard to memory width boundaries. A DMAC in accordance with an embodiment of the present invention stores information provided by a descriptor before frame processing takes place. This information in conjunction with steering logic and accumulator registers is used to control the steering and storing of the frame data as it passes through the DMAC to the transmit buffer or from the receive buffer.
    Type: Grant
    Filed: March 18, 1998
    Date of Patent: February 6, 2001
    Assignee: National Semiconductor Corp.
    Inventor: Mark A. Johnson
  • Patent number: 6184150
    Abstract: A plasma etch process is described for the etching of oxide with a high selectivity to nitride, including nitride formed on uneven surfaces of a substrate, e.g., on sidewalls of steps on an integrated circuit structure. The addition of a hydrogen-bearing gas to C4F8 or C2F6 etch gases and a scavenger for fluorine, in a plasma etch process for etching oxide in preference to nitride, results in a high selectivity to nitride which is preserved regardless of the topography of the nitride portions of the substrate surface.
    Type: Grant
    Filed: October 27, 1997
    Date of Patent: February 6, 2001
    Assignee: Applied Materials Inc.
    Inventors: Chan-Lon Yang, Mei Chang, Paul Arleo, Haojiang Li, Hyman Levinstein
  • Patent number: 6184729
    Abstract: Ground bounce and power supply bounce are reduced in an output driver by utilizing a plurality of p-channel and n-channel transistors which are connected to an output pad, by sequentially turning off the p-channel transistors before sequentially turning on the n-channel transistors, and by sequentially turning off the n-channel transistors before sequentially turning on the p-channel transistors.
    Type: Grant
    Filed: October 8, 1998
    Date of Patent: February 6, 2001
    Assignee: National Semiconductor Corporation
    Inventor: Ronald Pasqualini
  • Patent number: 6185172
    Abstract: A rotation control apparatus which does not rely upon a drop of a signal is provided. A lower limit frequency and an upper limit frequency calculated based on generation patterns of run length limited codes which may possibly be generated stochastically are set as a frequency variation range. When rotation control is performed based on an error between a frequency of run length limited codes reproduced from a disk and a reference frequency while a PLL circuit is not in a locked condition, the reference frequency is varied between the upper limit frequency and the lower limit frequency. Then, the reference frequency which is currently used for comparison when the PLL circuit is put into a locked condition is stored as a fixed value and used as the reference frequency for later rotation control.
    Type: Grant
    Filed: November 17, 1998
    Date of Patent: February 6, 2001
    Assignee: Sony Corporation
    Inventor: Tetsuji Nakazawa
  • Patent number: 6184413
    Abstract: Supported phase catalysts in which the support phase is highly polar, most preferably ethylene glycol or glycerol, are disclosed. An organometallic compound, preferably a metal complex of chiral sulfonated 2,2′-bis(diphenylphosphino)-1,1′-binaphthyl is dissolved in the support phase. Such supported phase catalysts are useful for asymmetric synthesis of optically active compounds, including the asymmetric hydrogenation of prochiral unsaturated carbon-hetero atom bonds, such as ketones, imines and beta-keto esters.
    Type: Grant
    Filed: June 11, 1999
    Date of Patent: February 6, 2001
    Assignee: California Institute of Technology
    Inventors: Mark E. Davis, Kam To Wan
  • Patent number: 6185070
    Abstract: A disc cartridge includes a shell having one side face and an opening, a shutter mounted to the shell to be slidable along the one side face between a first position where the shutter closes the opening and a second position where the shutter opens the opening, and a misinsertion preventing portion arranged with the one side face of the shell in a portion thereof out of a slide area of the shutter and having a recess for allowing introduction of a misinsertion preventing member of a drive.
    Type: Grant
    Filed: July 13, 1998
    Date of Patent: February 6, 2001
    Assignee: Sony Corporation
    Inventor: Hideaki Kumagai
  • Patent number: 6184859
    Abstract: A picture display apparatus for enlarging a portion of a picture displayed on a screen for display on the same screen. The picture display apparatus includes a display unit having a display screen on which a picture is displayed, a specifying unit for specifying an optional area of an overall picture displayed on a display screen of the display unit, a magnified picture generating unit for generating a magnified picture of the area specified by the specifying unit, and a display control unit for superimposing the magnified picture on the overall picture in such a manner that the magnified picture is superimposed on the overall picture and the portion of the overall picture overlapped below the magnified picture is rendered visible and displayed on the display screen of the display unit.
    Type: Grant
    Filed: April 19, 1996
    Date of Patent: February 6, 2001
    Assignee: Sony Corporation
    Inventor: Kiyonobu Kojima
  • Patent number: 6184552
    Abstract: In a non-volatile memory cell that has a select transistor and a memory transistor, the substrate trenching that occurs when the gate of the select transistor and the stacked gate of the memory transistor are initially defined is eliminated by forming the gate of the select transistor and the stacked gate of the memory transistor to have substantially the same step height.
    Type: Grant
    Filed: July 17, 1998
    Date of Patent: February 6, 2001
    Assignee: National Semiconductor Corporation
    Inventors: Alexander Kalnitsky, Albert Bergemont
  • Patent number: 6185578
    Abstract: The present invention provides a program creation apparatus for a software development system capable of deleting some of modules during an execution. A header file 30 and a source file 31 are compiled by a compiler 33 using a compile information 32 from a compile processing block 34 and the header file 30, so as to create an object file 35. Using a linker 38, a link information 37, and a library file 36, the object file 35 is linked in a link processing block 39 so as to become an execution-formatted file 40. A composite execution-formatted file information 41 provides an information about the execution-formatted file 40 to be contained in a composite execution-formatted file format file 43. According to this information, a composite execution-formatted file creation block 42 is supplied with an initialization program 78 and a plurality of execution-formatted files 40 and outputs the single composite execution-formatted file format file 43.
    Type: Grant
    Filed: October 7, 1998
    Date of Patent: February 6, 2001
    Assignee: Sony Corporation
    Inventors: Yasuhiko Yokote, Junichi Nakata
  • Patent number: 6184454
    Abstract: In a tone color map generating section, a tone color parameter and the effective time for making the tone color map effective are extracted from an SMF stored in a MIDI file database, and the tone color parameter is stored in a tone color map database. When a demand processing section receives a playback start position for starting the playback of the SMF, a read processing section reads the tone color parameter stored in the tone color map database in accordance with the playback start position, and generates time information indicating time to set the tone color parameter in a MIDI device. A sending circuit sends the tone color parameter together with the corresponding time information, and then sends a MIDI signal from the playback start position thereafter, stored in the MIDI file database.
    Type: Grant
    Filed: April 29, 1999
    Date of Patent: February 6, 2001
    Assignee: Sony Corporation
    Inventors: Kenichi Imai, Minoru Tsuji, Takashi Koike
  • Patent number: 6184930
    Abstract: A method of processing picture data, by an electronic still camera, that includes forming image data of an object, displaying the image data as a picture on a display, recording the image data in memory in response to a first switching operation, and reproducing and displaying the recorded image data in response to a second switching operation. The first and second switching operations are carried out by a two-level push button switch.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: February 6, 2001
    Assignee: Sony Corporation
    Inventors: Syoji Mitsuhashi, Satoru Gozu
  • Patent number: 6184884
    Abstract: An image controlling device and method thereof is provided with superior operability when making selections from a menu displayed on a display device such as a CRT display. In the preferred embodiments of the image controlling device and method of the present invention, a menu is constructed by arranging a plurality of menu items three-dimensionally along a cylinder. A portion of these menu items is then displayed in such a manner that viewing is performed from the center of this cylinder outwards. The shifting velocity of the menu items is changed while all of the menu items are shifted in response to input signals from a controller operated by the user and the menu item arranged at the center of the picture is determined to be the selected menu item. When a following level exists for the selected menu item, this level is proceeded to and menu items are displayed on the display device in the same way.
    Type: Grant
    Filed: November 12, 1998
    Date of Patent: February 6, 2001
    Assignee: Sony Corporation
    Inventors: Junichi Nagahara, Toshikazu Minoshima, Tomohisa Shiga, Hajime Ogura, Mayu Irimajiri
  • Patent number: 6184978
    Abstract: Particles in a fluid are counted as the fluid flows through an examination area of a particle analyzer. Parameters based upon the particle count are calculated. It is determined whether the at least one calculated parameter is within an allowable range for the parameter. Based on this determination, an indication is provided of uniformity of the fluid sample in the examination area.
    Type: Grant
    Filed: May 7, 1997
    Date of Patent: February 6, 2001
    Assignee: International Remote Imaging Systems, Inc.
    Inventors: Harvey Kasdan, Jaehyl Ko
  • Patent number: 6181796
    Abstract: A system and method which generates amplified signals indicative of left and right stereo channels, and uses the signals to drive transducers for each of subwoofer, left stereo, and right stereo channels. The amplification circuitry is operable with a power supply having low peak current capability (i.e., low peak to average current rating) even when amplifying an input signal pair having highly correlated frequency components, since it spreads the peak current demands imposed on the power supply over a full cycle of each of the highly correlated frequency components. A series-connected pair of left and right channel transducers is driven by left and right channel power amplifiers of the amplification circuitry, and the subwoofer channel transducer is connected in parallel with this transducer pair so that all three transducers are driven by two power amplifiers, thus eliminating the need for a third power amplifier to drive the subwoofer channel transducer.
    Type: Grant
    Filed: May 26, 1998
    Date of Patent: January 30, 2001
    Assignee: National Semiconductor Corporation
    Inventor: Nick M. Johnson
  • Patent number: 6180994
    Abstract: An array of sidewall-contacted antifuses is formed by a method that reduces the sensitivity of the array to masking alignment errors. The array includes a plurality of spaced-apart bit lines which are formed in a semiconductor material. Rows and columns of insulated contacts are formed on the semiconductor material such that each bit line is contacted a plurality of times by an insulated contact. In each row of contacts, each contact has an exposed sidewall. A plurality of word lines are formed over the contacts such that a word line is formed over each exposed sidewall in a row of exposed sidewalls. The word line includes a dielectric layer and a conductive layer.
    Type: Grant
    Filed: January 19, 1999
    Date of Patent: January 30, 2001
    Assignee: National Semiconductor Corporation
    Inventors: Albert Bergemont, Alexander Kalnitsky
  • Patent number: D437255
    Type: Grant
    Filed: April 4, 1996
    Date of Patent: February 6, 2001
    Assignee: California Institute of Technology
    Inventors: Don Bickler, Kenneth Jewett, Howard Eisen, Lee Sword