Patents Represented by Attorney, Agent or Law Firm Lois D. Gartier
  • Patent number: 6546536
    Abstract: A system and method for designing schematic diagrams of electronic circuits is provided. A library of electronic components represented in graphical form are selectable by a user for inclusion into a schematic diagram. The components are connected together to define a circuit that performs a function. In order to simulate and test a particular portion of the circuit rather than the entire circuit, the present invention provides a disabling routine that disables portions of the circuit not to be included in the simulation. The present invention allows a circuit designer/tester to focus on desired areas of a circuit while ignoring others.
    Type: Grant
    Filed: July 26, 2001
    Date of Patent: April 8, 2003
    Assignee: Xilinx, Inc.
    Inventor: Stephen David Nolan