Patents Represented by Attorney Loudermilk & Associate
  • Patent number: 6870616
    Abstract: A spectrometer apparatus for determining an optical characteristic of an object or material is disclosed. A probe is positionable to be in proximity to the object or material. First and second receivers are provided on the probe. Light from one or more first receivers is coupled to one or more first optical sensors via a spectral separation implement. Light from one or more second receivers is coupled to one or more second sensors without spectral separation of the light. A light source provides light to the object or material via the probe. A processor coupled to receive one or more signals from the first and second sensors determines the optical characteristic of the object or material and determines a physical position property of the probe with respect to the object or material or a non-color optical property of the object or material. The physical position property may be a distance or angular position of the probe with respect to a surface of the object or material.
    Type: Grant
    Filed: August 8, 2002
    Date of Patent: March 22, 2005
    Assignee: JJL Technologies LLC
    Inventors: Wayne D. Jung, Russell W. Jung, Alan R. Loudermilk
  • Patent number: 6868070
    Abstract: Web/portal-based systems and methods for selling, configuring, installing, reconfiguring and servicing such integrated voice/data communications systems are disclosed. An Internet/web or personal digital assistant (“PDA”) or personal computer (“PC”) based portal is provided to enable a relatively high level of data to be more easily collected. The portal preferably is graphical and guides either the customer or one or more sales persons (or site installer/technician, etc.) in the collection of user requirements data indicative of the particular customer's hardware, telephony and network service requirements. The user requirements data is a less technical, more intuitive level of user requirements data, as compared with configuration data. An initial test of the data preferably is performed, such as for purposes of data consistency, ensuring that all required data has been entered and the like.
    Type: Grant
    Filed: October 6, 2000
    Date of Patent: March 15, 2005
    Assignee: Vertical Networks, Inc.
    Inventors: Benjamin Alfred Alves, Adeline Pang, Alan R. Loudermilk
  • Patent number: 6815600
    Abstract: Systems and methods for creating, modifying, interacting with and playing music are provided, particularly systems and methods employing a top-down process, where the user is provided with a musical composition that may be modified and interacted with and played and/or stored (for later play). The system preferably is provided in a handheld form factor, and a graphical display is provided to display status information, graphical representations of musical lanes or components which preferably vary in shape as musical parameters and the like are changed for particular instruments or musical components such as a microphone input or audio samples.
    Type: Grant
    Filed: December 18, 2002
    Date of Patent: November 9, 2004
    Inventors: Alain Georges, Eric Laurent
  • Patent number: 6805900
    Abstract: A system for applying a thin coat of a material on one side only of a substrate is disclosed together with a process for applying the thin coat. Coatings of less than one thousand angstroms are attainable on a single surface of the substrate by controlling the speed at which a meniscus of a mix containing a predetermined concentration of the to coating material travels across the single surface being coated. Various pressure, temperature and humidity controls are implemented in the process and by the apparatus as needed to obtain the desired coating characteristics.
    Type: Grant
    Filed: March 3, 2003
    Date of Patent: October 19, 2004
    Inventor: Paul E. Lewis
  • Patent number: 6792493
    Abstract: A microprocessor comprising a bus state controller and for use in a personal computer or the like. The bus state controller includes control registers such as wait controllers, and parallelly controls the interfaces of various semiconductor memories (ROM, burst ROM, SRAM, PSRAM, DRAM and synchronous RAM) and PC cards (memory and I/O cards). Also included in the bus state controller is a control register for controlling the time to set up PC card start signals where a synchronous DRAM(s) is configured. The address space of an external bus of the microprocessor is divided into a predetermined number of areas to which the semiconductor memories and PC cards are fixedly assigned. The microprocessor further comprises a memory management unit for converting an internally prepared logical address to a physical address.
    Type: Grant
    Filed: January 7, 2003
    Date of Patent: September 14, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Shigezumi Matsui, Ikuya Kawasaki, Susumu Narita, Masato Nemoto
  • Patent number: 6774766
    Abstract: Systems and methods for efficiently querying and identifying multiple items on a communication channel are disclosed. The inventions preferably uses radio frequency identification with interrogation devices and systems that identify radio frequency identification transponders. A depth-first tree traversal protocol algorithm, including commands and symbols, is used to more efficiently interrogate a plurality of transponders in a short amount of time.
    Type: Grant
    Filed: July 21, 2000
    Date of Patent: August 10, 2004
    Assignee: E-Tag Systems, Inc.
    Inventor: Norman E. Moyer
  • Patent number: 6772325
    Abstract: A processor is disclosed utilizing improved branch control and branch instructions for optimizing performance of programs run on such processors. Flexible instruction parameter fields permit a variety of new branch control and branch instruction implementations best suited for a particular computing environment. These instructions also have separate prediction bits, which are used to optize loading of target instruction buffers in advance of program execution, so that a pipeline within the processor achieves superior performance during actual program execution.
    Type: Grant
    Filed: October 1, 1999
    Date of Patent: August 3, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Naohiko Irie, Tony Lee Werner
  • Patent number: 6772323
    Abstract: An improved branch instruction and associated branch control instruction are provided for optimizing handling of branch operations within a pipelined processor. The branch control instruction is adapted so that it can precede the branch instruction in a program sequence and provides branch target address computation information so that branch target addresses can be computed in advance of execution of one or mote associated branch instructions. Because branch target address computation information is disassociated from the actual branch instruction, more space is available within the branch instruction itself to permit additional new types of operations, such as folded-compare, register to register comparisons (including a compare to a zero valued register), predicate evaluations, etc.
    Type: Grant
    Filed: November 4, 2002
    Date of Patent: August 3, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Sivaram Krishnan, Sebastian Havluj Zlesler
  • Patent number: 6764385
    Abstract: A plasma assisted cryogenic cleaner for and a method of performing cleaning of a surface that must be substantially free of contaminants has a resiliently mounted nozzle for spraying a cryogenic cleaning medium on the surface. The cleaning is conducted by applying to the substrate surface a mixture of gases selected from the group consisting of oxygen, nitrogen, hydrogen, fluorine, hydrofluorocarbon or a mixture of such gases to both remove the photoresist layer and alter the composition of the residues such that the residues are soluble in water and/or have a weakened bonds that they can be removed with a stream of cryogenic medium. The cryogenic and plasma processes can be performed sequentially or simultaneously.
    Type: Grant
    Filed: July 29, 2002
    Date of Patent: July 20, 2004
    Assignee: NanoClean Technologies, Inc.
    Inventors: Mohamed Boumerzoug, Adel George Tannous, Khalid Makhamreh
  • Patent number: 6748507
    Abstract: A single-chip microcomputer comprising: a first bus having a central processing unit and a cache memory connected therewith; a second bus having a dynamic memory access control circuit and an external bus interface connected therewith; a break controller for connecting the first bus and the second bus selectively; a third bus having a peripheral module connected therewith and having a lower-speed bus cycle than the bus cycles of the first and second buses; and a bus state controller for effecting a data transfer and a synchronization between the second bus and the third bus. The single-chip microcomputer has the three divided internal buses to reduce the load capacity upon the signal transmission paths so that the signal transmission can be accomplished at a high speed. Moreover, the peripheral module required to have no operation speed is isolated so that the power dissipation can be reduced.
    Type: Grant
    Filed: June 13, 2002
    Date of Patent: June 8, 2004
    Assignees: Hitachi, Ltd., Hitachi ULSI Engineering Corp.
    Inventors: Shumpei Kawasaki, Yasushi Akao, Kouki Noguchi, Atsushi Hasegawa, Hiroshi Ohsuga, Keiichi Kurakazu, Kiyoshi Matsubara, Akio Hayakawa, Yoshitaka Ito
  • Patent number: 6744758
    Abstract: Systems and methods by which voice/data communications may occur in multiple modes/protocols are disclosed. In particular, systems and methods are provided for multiple native mode/protocol voice and data transmissions and receptions with a computing system having a multi-bus structure, including, for example, a TDM bus and a packet bus, and multi-protocol framing engines. Such systems preferably include subsystem functions such as PBX, voice mail and other telephony functions, LAN hub and data router. In preferred embodiments, a TDM bus and a packet bus are intelligently bridged and managed, thereby enabling such multiple mode/protocol voice and data transmissions to be intelligently managed and controlled with a single, integrated system. A computer or other processor includes a local area network controller, which provides routing and hub(s) for one or more packet networks. The computer also is coupled to a buffer/framer, which serves to frame/deframe data to/from the computer from TDM bus.
    Type: Grant
    Filed: May 10, 2002
    Date of Patent: June 1, 2004
    Assignee: Vertical Networks, Inc.
    Inventor: Scott K. Pickett
  • Patent number: 6738894
    Abstract: To obtain a correct vector address even if an interrupt occurs during erasing or programming of the data in a built-in ROM 18 by moving a part of a built-in RAM13 to a vector address area by a bus controller 27. Thereby, a microcomputer is prevented from running away and the safety of a system is improved at the time of on-board programming of the built-in ROM 18.
    Type: Grant
    Filed: September 5, 2000
    Date of Patent: May 18, 2004
    Assignee: Hitachi, Ltd.
    Inventor: Katsumi Iwata
  • Patent number: 6735683
    Abstract: A single-chip microcomputer comprising: a first bus having a central processing unit and a cache memory connected therewith; a second bus having a dynamic memory access control circuit and an external bus interface connected therewith; a break controller for connecting the first bus and the second bus selectively; a third bus having a peripheral module connected therewith and having a lower-speed bus cycle than the bus cycles of the first and second buses; and a bus state controller for effecting a data transfer and a synchronization between the second bus and the third bus. The single-chip microcomputer has the three divided internal buses to reduce the load capacity upon the signal transmission paths so that the signal transmission can be accomplished at a high speed. Moreover, the peripheral module required to have no operation speed is isolated so that the power dissipation can be reduced.
    Type: Grant
    Filed: October 4, 2002
    Date of Patent: May 11, 2004
    Assignees: Hitachi, Ltd., Hitachi ULSI Engineering Corp.
    Inventors: Shumpei Kawasaki, Yasushi Akao, Kouki Noguchi, Atsushi Hasegawa, Hiroshi Ohsuga, Keiichi Kurakazu, Kiyoshi Matsubara, Akio Hayakawa, Yoshitaka Ito
  • Patent number: 6731727
    Abstract: Methods for displaying caller identification information on an integrated display/telephone system capable of displaying images are disclosed. One or more signals are received and one or more images are displayed on a display of the integrated display/telephone system. An incoming telephone call is received with the integrated display/telephone system, and data corresponding to the incoming telephone call is received with the incoming telephone call. A caller identification display signal in generated, and the caller identification display signal is based on the one or more received signals and the data received with the incoming telephone call. The caller identification display signal includes the one more received signals and signals from a generator that generates character signals and background display signals.
    Type: Grant
    Filed: March 3, 2003
    Date of Patent: May 4, 2004
    Inventors: Joseph C. Corbett, William I. Fletcher, Alan R. Loudermilk
  • Patent number: 6727803
    Abstract: Systems and methods for efficiently querying and identifying multiple items on a communication channel are disclosed. The invention is well suited to use with radio frequency identification with interrogation devices and systems that identify radio frequency identification transponders. A depth-first tree traversal protocol algorithm, including commands and symbols, is used to more efficiently interrogate a plurality of transponders in a short amount of time.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: April 27, 2004
    Assignee: E-Tag Systems, Inc.
    Inventor: Robert Hulvey
  • Patent number: 6726476
    Abstract: Method for generating optical characteristics data of a dental object including at least color characteristics, are disclosed. Light is provided to the object and light is received from the object, and the received light is coupled to a camera, with the object positioned in the field of view of the camera. The optical characteristics data are generated based on camera data corresponding to the object and based on camera data corresponding to a calibration standard generated with the calibration standard in the field of view of the camera. The optical characteristics data may be stored in a record of a software database or used to prepare a second dental object.
    Type: Grant
    Filed: May 25, 2001
    Date of Patent: April 27, 2004
    Assignee: JJL Technologies LLC
    Inventors: Wayne D. Jung, Russell W. Jung, Alan R. Loudermilk
  • Patent number: 6719613
    Abstract: A cryogenic cleaner for and a method of performing cleaning of a surface that must be substantially free of contaminants utilizing a multi-stage, multi-mode filtered carbon dioxide-containing cleaning medium. Multiple stages and multiple types of filtration/purification are provided to remove contaminants such as hydrocarbons from the medium. In accordance with preferred embodiments, a filtering/purification process is provided that desirably utilizes one or more of: condensation of the hydrocarbon; particulate filtration; chemical filtration using activated filters; and catalytic oxidation. In certain embodiments, a resiliently mounted nozzle is provided for spraying a cryogenic cleaning medium on the surface. The nozzle may be driven in an oscillatory manner at a predetermined amplitude and frequency so the nozzle spray is delivered in a manner to provide pulsing of the spray and to provide as “snow plow” effect on contaminants as the spray delivers the cleaning medium against the surface.
    Type: Grant
    Filed: February 7, 2003
    Date of Patent: April 13, 2004
    Assignee: NanoClean Technologies, Inc.
    Inventors: Goodarz Ahmadi, Paul E. Lewis, Adel George Tannous, Khalid Makhamreh, Keith H. Compton
  • Patent number: 6682709
    Abstract: Gas-phase methods and systems for reducing NOx emissions and other contaminants in exhaust gases, and industrial processes using the same, are disclosed. In accordance with the present invention, hydrocarbon(s) autoignite and autothermally heat an exhaust gas from an industrial process so that NH3, HNCO or a combination thereof are effective for selectively reducing NOx autocatalytically. Preferably, the reduction of NOx is initiated/driven by the autoignition of hydrocarbon(s) in the exhaust gas. Within the temperature range of about 900-1600° F., the introduced hydrocarbon(s) autoignite spontaneously under fuel-lean conditions of about 2-18% O2 in the exhaust gas. Once ignited, the reactions proceed autocatalytically, heating the exhaust gas autothermally. Under some conditions, a blue chemiluminescence may be visible.
    Type: Grant
    Filed: July 2, 2001
    Date of Patent: January 27, 2004
    Assignee: Noxtech, Inc.
    Inventors: Bruce C. Sudduth, Ralph J. Slone, Vishwesh Palekar, Madhu Ramavajala
  • Patent number: 6633848
    Abstract: Systems and methods by which voice/data communications may occur in multiple modes/protocols are disclosed. In particular, systems and methods are provided for multiple native mode/protocol voice and data transmissions and receptions with a computing system having a multi-bus structure, including, for example, a TDM bus and a packet bus, and multi-protocol framing engines. Such systems preferably include subsystem functions such as PBX, voice mail and other telephony functions, LAN hub and data router. In preferred embodiments, a TDM bus and a packet bus are intelligently bridged and managed, thereby enabling such multiple mode/protocol voice and data transmissions to be intelligently managed and controlled with a single, integrated system. A computer or other processor includes a local area network controller, which provides routing and hub(s) for one or more packet networks. The computer also is coupled to a buffer/framer, which serves to frame/deframe data to/from the computer from TDM bus.
    Type: Grant
    Filed: August 4, 1999
    Date of Patent: October 14, 2003
    Assignee: Vertical Networks, Inc.
    Inventors: Christopher Sean Johnson, Scott K. Pickett
  • Patent number: 6629207
    Abstract: Methods of operating an instruction cache memory in a data processing system are disclosed. The data processing system executes instructions and stores and receives data from a memory having locations in a memory space. The entries of the instruction cache memory include a number of sets (nsets), where each of the sets comprise a number of ways (nways). One or more first instructions may be executed to load one or more instructions into a first way of the instruction cache memory. One or more second instructions may be executed to lock the first way of the instruction cache memory. A sequence of instructions may be executed including the one or more instructions loaded in the first way of the instruction cache memory, and it may be predetermined that the one or more instructions loaded in the first way of the instruction cache memory will executed without retrieving the one or more instructions from the memory during execution of the sequence of instructions.
    Type: Grant
    Filed: October 1, 1999
    Date of Patent: September 30, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Shinichi Yoshioka, Rajesh Chopra, Atsushi Hasegawa