Patents Represented by Attorney, Agent or Law Firm Louis P. Herzberg
  • Patent number: 6215772
    Abstract: The invention describes a scheme by which the dynamic characteristics of virtual links provided to a first network protocol engine are fed back to a second network protocol engine, and used to improve the performance of the second protocol traffic across a backbone. As an example, the invention describes a scheme by which the dynamic characteristics of the virtual links provided to the HPR network are fed back to the RTP protocol, and used to improve the performance of RTP traffic across the IP backbone. The invention provides this feedback using the mechanisms provided by the HPR networking architecture, and thus can inter-operate with HPR networks that do not support this invention. In one embodiment of the present invention, on the link characteristics are determined by programs running on both end of the IP network. These link characteristics are sent to the HPR end-node when an HPR connection is established. The HPR end-node obtains the information during the connection establishment phase.
    Type: Grant
    Filed: November 26, 1997
    Date of Patent: April 10, 2001
    Assignee: International Business Machines Corporation
    Inventor: Dinesh Chandra Verma
  • Patent number: 6208753
    Abstract: A system and process by which misregistration among the pixel components of the several color planes of a color image can be substantially eliminated is presented. In an embodiment, the physical object which comprises the test scene is represented as having features that are uniform squares of alternating black and white color arranged. The digitized color image of the test scene is employed to make measurements of misregistration of scene features in its color planes. A process by which misregistration among the several color planes is measured, and substantially eliminated, is made up of three parts. First, one of the color planes is chosen as a reference plane. The remainder of the color planes are called secondary planes. The relative misregistration of image features in the secondary planes relative to corresponding image features in the reference plane are measured at dispersed pixel locations in the reference plane.
    Type: Grant
    Filed: February 27, 1998
    Date of Patent: March 27, 2001
    Assignee: International Business Machines Corporation
    Inventors: Gordon Wesley Braudaway, James Edward Christensen, Gerhard Robert Thompson
  • Patent number: 6201881
    Abstract: Information is embedded in a three-dimensional geometric model in a visible or invisible state by changing geometric parameters of a three-dimensional geometric model. The three-dimensional geometric model comprises polyhedrons, lines, a set of points, or curved surfaces which are primitives (components) of the model. Each primitive is defined by a geometric parameter. The geometric shape of a three-dimensional geometric model is defined by a set of many geometric parameters. The information is embedded by changing the geometric parameters of a plurality of primitives constituting a three-dimensional geometric model.
    Type: Grant
    Filed: May 22, 1998
    Date of Patent: March 13, 2001
    Assignee: International Business Machines Corporation
    Inventors: Hiroshi Masuda, Ryutarou Ohbuchi, Masaki Aono
  • Patent number: 6194838
    Abstract: A virtual non-thermionic cathode has the position of a space charge cloud associated with it fixed by the geometry of a fixed insulating layer. The layer can be made to accurate dimensions and hence the cathode to control grid dimension can be accurately controlled and will not change as a result of any mechanical, electrical or physical changes in the construction. The fixed insulating layer is located on a surface of the control grid facing the cathode. A space charge layer is built up on the surface of the insulating layer facing the cathode, and thus emission from the cathode is stabilized.
    Type: Grant
    Filed: February 19, 1998
    Date of Patent: February 27, 2001
    Assignee: International Business Machines Corporation
    Inventors: John Stuart Beeteson, Andrew Ramsay Knox, Christopher Carlo Pietrzak
  • Patent number: 6189056
    Abstract: Providing an information processing terminal of a folded structure comprising a first housing portion having a form factor defined by PCMCIA and a second housing pivotally coupled to the first housing portion with an improved reliability of a cable passing through the coupling portion. The data processing part, which is a core part of the PDA function, is contained within the second housing portion which is not subject to restriction of shape and size. As a result, the first housing portion which has to conform to the PCMCIA/JEIDA specification may be relatively easily designed. For example, while the information processing apparatus is provided with a key input means in the first housing portion, it is possible to use a high function key board such as a keyboard of an excellent feel of key touch or a back lighted keyboard.
    Type: Grant
    Filed: May 19, 1998
    Date of Patent: February 13, 2001
    Assignee: International Business Machines Corporation
    Inventors: Akihiro Ogura, Shigeru Yuzawa
  • Patent number: 6181683
    Abstract: A system and method for the wireless transmission of data packets in a code division multiple access communication system wherein one of the code division multiple access channels (PRCH) is used in a time-shared fashion for the transmission of the data packets from several transmitting stations (MSy, MSz) to a receiving station (BS). A request is sent from a transmitting station (MSy) to the corresponding receiving station (BS) of the communication system indicating the destination address to which data packet(s) are to be routed. Then, registering the transmitting station (MSy) and assigning an unique virtual connection identifier (VCIy) to it. Next, the transmitting station (MSy) is attached to the code division multiple access channel (PRCH) used for the transmission of data packets.
    Type: Grant
    Filed: December 3, 1997
    Date of Patent: January 30, 2001
    Assignee: International Business Machines Corp.
    Inventors: Pierre R. Chevillat, Roy D. Cideciyan, Marcel Rupf, Wolfgang H. Schott
  • Patent number: 6177759
    Abstract: A display device comprises a substrate, cathode means for emitting electrons, a permanent magnet and one or more supports between the substrate and the magnet. A two dimensional array of channels extends between opposite poles of the magnet, the magnet generating, in each channel, a magnetic field for forming electrons from the cathode means into an electron beam. A screen receives an electron beam from each channel, the screen having a phosphor coating facing the side of the magnet remote from the cathode, the phosphor coating comprising a plurality of pixels each corresponding to a different channel. Grid electrode means is disposed between the cathode means and the magnet for controlling flow of electrons from the cathode means into each channel, the grid electrode means having a plurality of apertures, each aperture corresponding to one of the channels.
    Type: Grant
    Filed: May 11, 1998
    Date of Patent: January 23, 2001
    Assignee: International Business Machines Corporation
    Inventors: John Beeteson, Andrew Ramsay Knox
  • Patent number: 6167521
    Abstract: An apparatus, system and method for secure code-downloading and information exchange, in the full generality of complex code dependencies while considering the implications of mutual distrust and hot-swapping. Included are secure techniques wherein an authority signs code from another party upon which that authority depends in order to establish that a trusted execution environment, is being preserved. Trusted code is employed to ensure that proprietary data is destroyed, disabled, and/or made unreadable, when a change causes the trusted execution environment to cease holding to a certain security level. A carefully constructed key structure is employed to ensure that communications allegedly from particular code in a particular environment can be authenticated as such. Authenticity of code that decides the authenticity of public-key signatures, and/or the authenticity of other code is cared for. In particular, the loading code that performs these tasks may itself be reloadable.
    Type: Grant
    Filed: August 29, 1997
    Date of Patent: December 26, 2000
    Assignee: International Business Machines Corporation
    Inventors: Sean William Smith, Steve Harris Weingart
  • Patent number: 6061508
    Abstract: An apparatus and method is presented for capacitance analysis in chip environments for arbitrary geometries. It uses a process which combines 2-dimensional ascertainments where the length is chosen to fit the solution. Also, the required accuracy may be limited to be within an error range. The technique is also applicable for the analysis of three dimensional capacitances, and importantly also for a mixture of two and three dimensional capacitance ascertainments. In an embodiment the process divides the space into a set of subspaces. The capacitance value for the subspaces are determined using the parallel plate capacitance formula.
    Type: Grant
    Filed: July 3, 1997
    Date of Patent: May 9, 2000
    Assignee: International Business Machines Corporation
    Inventors: Sharad Mehrotra, Jagannathan Narasimhan, Albert Emil Ruehli
  • Patent number: 6034802
    Abstract: This invention provides a solution to the problem of determining how long the peak value detected for the first pulse be kept, and when should it be updated. In infrared communication, the communication distance may vary over time during the transmission. For instance in a mobile infrared telephone the users generally are moving with respect to each other. The signal amplitude changes within a very large range over time and the receiver expected to operate in this environment must also handle a large number of different communication protocols. It uses the instant signal as a basis for adjusting the threshold. The present invention is capable of accepting a wide input dynamic range of signals up to and beyond five orders of magnitude (50 dB). This is accomplished while overcoming the difficulties presented by many communications protocols, by providing a technique in which the output pulse width of an amplified photo detector input is not strongly dependent upon the input signal amplitude.
    Type: Grant
    Filed: December 24, 1997
    Date of Patent: March 7, 2000
    Assignee: International Business Machines Corporation
    Inventor: Kai Di Feng
  • Patent number: 6023269
    Abstract: A source image and image processing content are stored. If a processed image is requested, the source image is processed according to the processing content and the processed image is displayed. When a source image (unprocessed image) associated with a database is read, a corresponding processed image is displayed according to the processing content stored. An item(s) of processing content instructed to be undone is deleted from the processing content stored, and image processing is then retried according to the processing content after the deletion.
    Type: Grant
    Filed: June 2, 1994
    Date of Patent: February 8, 2000
    Assignee: International Business Machines Corporation
    Inventor: Shouichi Matsuo
  • Patent number: 6013537
    Abstract: The present invention is a structure and method to reduce the inductance of the AC test signal path used for testing an electrical device contained within a semiconductor wafer. This extends the frequency range of testing. It enables testing the devices perform characteristics at higher frequencies than otherwise useable. It is particularly directed for testing on-wafer VCSELs. The method provides to the electrical device the characteristics of a microwave bias-tee device. An on wafer capacitor is designed into the environment of the electrical device enabling the formation and use of the three ports of a bias-tee. Preferably, the bias-tee is formed in a manner not requiring the addition of processing steps to the wafer manufacturing process. The method further provides a way to increase the capacitance of the on-wafer capacitor.
    Type: Grant
    Filed: March 10, 1998
    Date of Patent: January 11, 2000
    Assignee: International Business Machines Corporation
    Inventor: Daniel M. Kuchta
  • Patent number: 5978810
    Abstract: A data management system and method enables the storage of long records in a set of keyed physical records of restricted length while minimising movement of data. The logical record to be stored is logically divided into a number of physical record portions to each of which is prepended a key with a unique sequence number. By starting from one end of the record with the key of highest sequence number and copying the physical record consisting of key plus data into the data set, successive physical records can be assembled in situ by overwriting the previous record's data portion with the current record's key. This ensures that the split logical record data need only be moved once as it is transferred to non-volatile storage as physical records of the data set. The original logical record can be reassembled by reversing the above procedure.
    Type: Grant
    Filed: February 3, 1998
    Date of Patent: November 2, 1999
    Assignee: International Business Machines Corporation
    Inventors: Ian James Mitchell, Steven Powell
  • Patent number: 5910730
    Abstract: The present invention provides a circuit for increasing the noise tolerance of a receiving gate. This is accomplished by separating the circuit which sets the positive going threshold, from the circuit which sets the negative going threshold. This eliminates the need of making a design compromise equally suitable to both these threshold requirements. It is achieved by separating the logical drive for switching from a low to a high from the logical drive for switching from a high to a low. Alternate embodiments are presented. In one embodiment, separate drivers for PFET and NFET inverter inputs are employed together with an output latch circuit which prevents the output from being in a floating state. In an alternate embodiment the latch is included in-line with the gate output. An implementation of the invention in a two input AND gate is also described.
    Type: Grant
    Filed: December 13, 1996
    Date of Patent: June 8, 1999
    Assignee: International Business Machines Corporation
    Inventor: Leon Jacob Sigal
  • Patent number: 5909127
    Abstract: This invention provides a circuit and method to replace the passive resistive or statically biased active load devices with dynamically biased active load devices. This allows the load devices to present an effective load which varies depending on the state of the circuit output. The effective load and the time rate of change of the effective load can be dynamically optimized to improve circuit performance with changing conditions. The effective load is varied according to the state of the circuit by the use of time-delayed negative feedback. The biasing of the load devices is also capable to control the logic swing of the circuit. A bias generating circuit employing a dynamically biased active load is described. This provides a method for a family of logic circuits, especially CML circuits, to operate at low voltage and low power at high switching speeds, having symmetrical rise and fall times and well defined logic signal swings.
    Type: Grant
    Filed: February 14, 1996
    Date of Patent: June 1, 1999
    Assignee: International Business Machines Corporation
    Inventors: Dale Jonathan Pearson, Scott Kevin Reynolds
  • Patent number: 5891746
    Abstract: The present invention is a structure and method to reduce the inductance of the AC test signal path used for testing an electrical device contained within a semiconductor wafer. This extends the frequency range of testing. It enables testing the device's performance characteristics at higher frequencies than otherwise useable. It is particularly directed for testing on-wafer VCSELs. The method provides to the electrical device the characteristics of a microwave bias-tee device. An on wafer capacitor is designed into the environment of the electrical device enabling the formation and use of the three ports of a bias-tee. Preferably, the bias-tee is formed in a manner not requiring the addition of processing steps to the wafer manufacturing process. The method further provides a way to increase the capacitance of the on-wafer capacitor.
    Type: Grant
    Filed: March 10, 1998
    Date of Patent: April 6, 1999
    Assignee: International Business Machines Corporation
    Inventor: Daniel M. Kuchta
  • Patent number: 5884259
    Abstract: A method and apparatus for using a tree structure to constrain a time-synchronous, fast search for candidate words in an acoustic stream is described. A minimum stay of three frames in each graph node visited is imposed by allowing transitions only every third frame. This constraint enables the simplest possible Markov model for each phoneme while enforcing the desired minimum duration. The fast, time-synchronous search for likely words is done for an entire sentence/utterance. The list of hypotheses beginning at each time frame is stored for providing, on-demand, lists of contender/candidate words to the asynchronous, detailed match phase of decoding.
    Type: Grant
    Filed: February 12, 1997
    Date of Patent: March 16, 1999
    Assignee: International Business Machines Corporation
    Inventors: Lalit Rai Bahl, Ellen Marie Eide
  • Patent number: 5825892
    Abstract: A robust means of watermarking a digitized image with a highly random sequence of pixel brightness multipliers is presented. The random sequence is formed from `robust-watermarking-parameters` selected and known only by the marker and/or the marking entity. A watermarking plane is generated which has an element array with one-to-one element correspondence to the pixels of the digitized image being marked. Each element of the watermarking plane is assigned a random value dependent upon a robust random sequence and a specified brightness modulation strength. The so generated watermarking plane is imparted onto the digitized image by multiplying the brightness value or values of each pixel by its corresponding element value in the watermarking plane. The resulting modified brightness values impart the random and relatively invisible watermark onto the digitized image. Brightness alteration is the essence of watermark imparting.
    Type: Grant
    Filed: October 28, 1996
    Date of Patent: October 20, 1998
    Assignee: International Business Machines Corporation
    Inventors: Gordon Wesley Braudaway, Frederick Cole Mintzer
  • Patent number: 5793746
    Abstract: A wiring scheme for providing loop-back capability for individual failed channels around a ring network composed of nodes with limited space-switching. With this invention each node has a switch for interconnecting channels between incident links of the node. Each secure channel i has a backup channel B(i). In the normal mode of operation, the switch is configured so that the ports for channel B(i) of the incident links are connected to each other. Upon failure of channel i in one of the incident links of the node, the port for channel i of the failed link is connected to the port for channel B(i) on the other incident link of the node. With this invention when there is a failure of channel i on one of the links, the connection using this failed channel can be restored by switch configurations at only two nodes of the ring since the backup channels at the other nodes are already connected to each other.
    Type: Grant
    Filed: April 29, 1996
    Date of Patent: August 11, 1998
    Assignee: International Business Machines Corporation
    Inventors: Ornan Alexander Gerstel, Rajiv Ramaswami
  • Patent number: 5757027
    Abstract: The present invention is a structure and method to reduce the inductance of the AC test signal path used for testing an electrical device contained within a semiconductor wafer. This extends the frequency range of testing. It enables testing the device's performance characteristics at higher frequencies than otherwise useable. It is particularly directed for testing on-wafer VCSELs. The method provides to the electrical device the characteristics of a microwave bias-tee device. An on wafer capacitor is designed into the environment of the electrical device enabling the formation and use of the three ports of a bias-tee. Preferably, the bias-tee is formed in a manner not requiring the addition of processing steps to the wafer manufacturing process. The method further provides a way to increase the capacitance of the on-wafer capacitor.
    Type: Grant
    Filed: January 16, 1996
    Date of Patent: May 26, 1998
    Assignee: International Business Machines Corporation
    Inventor: Daniel M. Kuchta