Abstract: A packaged integrated circuit having a thermal pathway to exhaust heat from the integrated circuit. The integrated circuit is disposed on a package substrate, with an encapsulant disposed around the integrated circuit. A heat sink is disposed at least partially within the encapsulant, with at least a portion of one surface of the heat sink exposed outside of the encapsulant. The integrated circuit has an uppermost passivation layer, where the passivation layer is not electrically conductive, with a port disposed in the passivation layer. The port extends completely through the passivation layer to expose an underlying layer. A thermal pathway is disposed at least partially within the port, and makes thermal contact to both the underlying layer and the heat sink. The thermal transfer rate of the thermal pathway is greater than the thermal transfer rate either the passivation layer or the encapsulant.
Abstract: In one embodiment, a surface analyzer system comprises a radiation targeting assembly to target a radiation beam onto a surface; and a scattered radiation collecting assembly that collects radiation scattered from the surface. The radiation targeting assembly generates primary and secondary beams. Data collected from the reflections of the primary and secondary beams may be used in a dynamic range extension routine, alone or in combination with a power attenuation routine.
Type:
Grant
Filed:
March 14, 2008
Date of Patent:
March 13, 2012
Assignee:
KLA-Tencor Corporation
Inventors:
Christian Wolters, Anatoly Romanovsky, Daniel Kavaldjiev, Bret Whiteside
Abstract: A digital latch circuit substantially reduces leakage current in output stages of edge-triggered digital switching devices. The circuit comprises first and second NAND gates for receiving first and second input signals and providing first and second output signals. The first NAND gate includes a first A input for receiving the first input signal, a first B input connected to a second NAND gate output, a first leakage current control input connected to a second A input of the second NAND gate, and a first NAND gate output for providing the first output signal. The second NAND gate includes the second A input for receiving the second input signal, a second B input connected to the first NAND gate output, a second leakage current control input connected to the first A input of the first NAND gate, and the second NAND gate output for providing the second output signal.
Abstract: A braking device removably attachable to a skateboard having a plurality of wheels, the device comprising a plurality of wheel engaging means, each for engaging a wheel of a skateboard, said device being operable to restrain the wheels against rotation relative to the skateboard.