Patents Represented by Law Firm Majestic, Parsons, Siebet & Hsue
  • Patent number: 4885584
    Abstract: In the serializer for converting parallel data into serial data, where the parallel data comprises normal characters all of the same length and a last character of a different length, the characters are each tagged by an extra bit as it enters a FIFO. This tag bit indicates the length of the character and is shifted along with the character as the character is shifted through the FIFO. The normal character length and the length of the last character are stored. As a character emerges from the FIFO, its tag bit identifies it as a normal character or as the last character. Such tag bit is used to select the correct character length in a counter. The character is loaded in a shifter which is controlled by the counter. Therefore, the shifter is controlled by the counter to shift the correct number of times in order to shift the character into a serial bit stream.
    Type: Grant
    Filed: April 7, 1988
    Date of Patent: December 5, 1989
    Assignee: Zilog, Inc.
    Inventor: Monte J. Dalrymple