Abstract: A digital audio dynamic range compressor includes a root mean square estimator receiving first and second audio input samples and generating root mean square values of the samples. A gain calculator receives the root mean square values and computes a gain for each input sample in the linear domain, not in the logarithmic or dB domain. A minimum selector receives the computed gain of each input sample and determines a minimum. An attack and release filter receives the minimum gain value and filters the minimum gain value according to attack and release coefficients and generate a gain output. A multiplier receives the gain output and multiplies the first and second audio input samples with the gain output.

Abstract: A semiconductor reliability test structure (10) is formed on a face of a semiconductor substrate. The test structure (10) includes a chain of a plurality of long test links (12) formed of a first semiconductor material, where the plurality of long test links (12) is alternately interconnected by a plurality of short connecting links (14) formed of a second semiconductor material. The test structure (10) further includes first and second bond pads (20, 22) coupled to the first and second ends of the chain, respectively.

Abstract: A method and apparatus for encapsulating an integrated circuit die and leadframe assembly. A prepackaged sproutless mold compound insert 71 is placed in a rectangular receptacle 91 in a bottom mold chase 81. The receptacle is coupled to a plurality of die cavities 85 by runners 87. Leadframe strip assemblies containing leadframes, integrated circuit dies, and bond wires coupling the leadframes and dies are placed over the bottom mold chase 81 such that the integrated circuit dies are each centered over a bottom mold die cavity 85. A top mold chase 90 is placed over the bottom mold chase 81 and the mold compound package 71. The top mold chase 90 has die cavities 95 corresponding to those in the bottom mold chase 81. The mold compound insert 71 is preferably packaged in a plastic film 75 which has heat sealed edges 77. The mold compound is forced through the package 75 and heat seals 77 during the molding process by the pressure applied by a rectangular plunger 101.

Abstract: An operational amplifier input stage includes a first differential input transistor and a second differential input transistor receiving a differential input voltage. A first translinear loop is coupled to the first differential input transistor and a second translinear loop is coupled to the second differential input transistor. The first and second translinear loops are operable to supply an instantaneous current to the respective first and second differential input transistors to sufficiently charge capacitances therein during slewing conditions.

Abstract: An apparatus and method for automatically detecting defects on silicon dies on silicon wafers comprising a silicon wafer acquisition system (30) and a computer (32) connected to said silicon wafer image acquisition system (10), wherein said computer (32) automatically aligns a silicon wafer (16), calibrates the image acquisition system (30), analyzes die images by determining a statistical die model from a plurality of dies, and compares the statistical die model to silicon die images to determine if the silicon dies have surface defects, is disclosed.

Abstract: A supply reference voltage circuit is coupled to an output node, a supply voltage node and a supply reference voltage node and is operable to connect the output node to the supply reference voltage node and prevent current flow through an output device coupled to the output node in response to sensing a low voltage level at the supply voltage node and a non-zero voltage at the output node. The circuit is further operable to connect the supply reference voltage node to the supply voltage node in response to the voltage at the output node being a threshold voltage above the voltage at the supply voltage node. The circuit is further operable to bypass a blocking diode in response to sensing a high voltage level at the supply voltage node.

Abstract: A post write buffer for a dual clock system which improves the utilization of host data bus (10) bandwidth is provided which consists of an address buffer (60), a data buffer (62), a first clock timing signal (22), a second clock timing signal (48), an address decoder (24), a first write enable circuit (72), and a second write enable circuit (74). The address-buffer (60) and data buffer (62). hold the data and the destination address for that data until the clock signals are synchronized and the data is ready for transfer. The address decoder (24) determines which destination register byte will receive the data in the host data bus (10). The write enable circuits (72, 74) synchronize the clock signals (22, 48) and determine when the destination register is ready to receive the data from the data buffer (62).

Abstract: CMOS semiconductor pass-transistor logic circuitry (200) is disclosed, comprising pass transistor circuitry (204, 212, 218), and tunneling structure circuitry (228) coupled to the pass transistor circuitry; where the tunneling structure circuitry is adapted to hold a node (222) voltage stable by compensating a leakage current (302) originating from said pass transistor circuitry.

Abstract: An operational amplifier input stage includes a first differential input transistor and a second differential input transistor receiving a differential input voltage. A first translinear loop is coupled to the first differential input transistor and a second translinear loop is coupled to the second differential input transistor. The first and second translinear loops are operable to supply an instantaneous current to the respective first and second differential input transistors to sufficiently charge capacitances therein during slewing conditions.

Abstract: A palladium plated lead frame (34) for integrated circuit devices has a nickel strike (36) and a palladium/nickel alloy layer (38) separating the copper base metal (28) from the nickel intermediate layer (40) in order to prevent a galvanic potential from drawing copper ions from the base metal layer (28) to the top layer (42). The nickel strike (36) and palladium/nickel alloy layer (38) also reduce the number of paths through which a copper ion could migrate to the top surface resulting in corrosion.

Abstract: The differential output signals from the sense amplifiers of a dynamic random access memory unit are applied to apparatus which converts these output signals to a non-differential current mode signal. The non-differential current mode signal is applied to a data line. The output signal from the data line is converted to a small swing voltage signal. The small swing voltage signal is compared with a reference voltage level thereby generating a full swing voltage output signal. The reference voltage level is generated by a sample and hold circuit which samples the small swing voltage level when the differential signals from the sensors are equal. The sampled level is stored for comparison with the small swing voltage level resulting from the sensing of the stored voltage level. The full swing voltage output signal is suitable for use with CMOS circuits associated with the dynamic random access memory unit.