Patents Represented by Attorney Mark J. Casey, Esq.
  • Patent number: 5802557
    Abstract: A digital data storage subsystem stores data for use by digital data utilization device. The data as used by the digital data utilization device being organized in the form of variable-length records. The digital data storage subsystem includes a digital data storage device, a cache and a cache control. The digital data storage device has at least one fixed block storage unit for storing a predetermined amount of data, the storage unit storing at least one record and additional padding if the record does not comprise at least said predetermined amount of data. The cache including at least one cache slot which can accommodate the storage of the predetermined amount of data, that is, the amount which can be stored on the block storage unit of the digital data storage device.
    Type: Grant
    Filed: March 18, 1996
    Date of Patent: September 1, 1998
    Inventors: Natan Vishlitzky, Yuval Ofek, Haim Kopylovitz
  • Patent number: 5734815
    Abstract: A method and apparatus are for maintaining a cyclic redundancy check (CRC) byte is described which eliminates additional input/output (I/O) transactions for the case when a write to a partial sector is required while the CRC byte is maintained for an entire sector. The method includes performing an XOR operation between the partial write data and the data it is to displace, and then performing an XOR operation between the old CRC byte associated with the sector and the result of the XOR operation between the partial write data and the data it is to displace.
    Type: Grant
    Filed: August 22, 1996
    Date of Patent: March 31, 1998
    Assignee: EMC Corporation
    Inventor: Alon Schatzberg
  • Patent number: 5708784
    Abstract: A dual bus architecture for a computer system including a number of computer system devices and a number of computer system resources. Each of the computer system devices and computer system resources are coupled by first and second communication busses. First and second bus arbitrators provide bus arbitration functions allowing first and second computer system devices to access first and second computer system resources simultaneously. A method of accessing a number of computer system resources by a number of computer system devices coupled by a dual bus architecture is also provided.
    Type: Grant
    Filed: February 20, 1997
    Date of Patent: January 13, 1998
    Assignee: EMC Corporation
    Inventors: Moshe Yanai, Natan Vishlitzky, Bruno Alterescu, Daniel Castel
  • Patent number: 5602717
    Abstract: First and second pairs of pins and cooperative first and second pairs of pin receiving apertures are provided at the confronting connector faces of each of one or more data storage device carrier subassemblies and an interconnection board of a storage system card cage subassembly into which each data storage device carrier subassembly is slidably mounted. The first pin/aperture pair engage and cooperate first to prealign, mechanically support and vibrationally damp each data storage device carrier subassembly.
    Type: Grant
    Filed: July 27, 1994
    Date of Patent: February 11, 1997
    Assignee: EMC Corporation
    Inventors: Eli Leshem, Tuvia Leneman, Lee Spechts, Ernest Sachs