Abstract: Interface logic is disclosed. The interface logic comprises a first address decoder, a first set of mode logic coupled to the address decoder and a first selector coupled to the first set of mode logic. The interface logic is adaptable to connect the programmable logic to the system interconnect via one of a plurality of access modes supported by the system interconnect.
Type:
Grant
Filed:
August 21, 2000
Date of Patent:
June 22, 2004
Assignee:
Xilinx, Inc.
Inventors:
Wilson Yee, Brian Fox, Sridhar Krishnamurthy, Bart Reynolds, Steven Winegarden