Abstract: Protection for the transmission of higher amplitude outputs required of differential amplifiers formed by thin oxide transistors with limited maximum voltage tolerance used where compliance with communication protocol standards requires handling voltages which may, in transition, exceed desirable levels is provided by limiting the voltage across any two device terminals under power down conditions.

Abstract: A control sub system, a plurality of interface processors, a plurality of media interfaces a plurality of queues are operatively coupled and responsive to a control signal to move data from a memory to a selected one of the plurality of queues.

Abstract: Assigning interrupts for I/O devices among the nodes of NUMA systems is disclosed. At least one of the following is performed. First, interrupts for the devices are assigned among the nodes based on at least one of: the nodes to which the devices are connected, the nodes at which interrupt service routines for the devices reside, and the processors of the nodes. Second, for each node, the interrupts for the devices that are performance critical and that have been assigned to the node are assigned to the processors of the node in a round-robin manner. Third, assignments of the interrupts among the nodes of the system are dynamically modified based on actual performance characteristics of the assignments. Fourth, for each node, assignments of the interrupts that are performance critical and that have been assigned to the node are dynamically modified based on actual performance characteristics of the assignments.

Abstract: The automatic restart and resume of computing systems upon reapplication of external power, especially in the context of grid computing, is disclosed. A method receives a signal, such as an ACPI S4 signal, indicating that a power source of a computing system has discharged below a predetermined threshold level. The method sets a flag corresponding to signal receipt. The system enters hibernation or another state. Upon learning that external power has been reapplied, the method determines that the flag is set, and resets it. The system is caused to enter an unattended operation mode in which, for instance, grid-computing tasks may be resumed.

Abstract: A method and apparatus for preventing unauthorized access to data stored in memory utilizing two programmable logic devices as front end interfaces for the memory device and the data processing device which is to utilize the memory device, respectively. The two programmable logic devices are complementary programmed such that the signal lines between the data processing device and the memory core and/or their timing are scrambled at the interface between the two programmable logic devices, but are properly ordered with the proper timing at the interface between the memory core and the first programmable logic device and the interface between the data processing device and the second programmable logic device.

Abstract: An elastic interface apparatus and method are implemented. The elastic interface includes a plurality of storage units for storing for storing a stream of data values, wherein each storage unit sequentially stores members of respective sets of data values. Each data value is stored for a predetermined number of periods of a local clock. Selection circuitry may be coupled to the storage units to select the respective data value from the data stream for storage in the corresponding storage unit. Data is sequentially output from each storage unit in synchrony with the local clock on a target cycle of the local clock.

Abstract: A latch circuit (10) includes a feedback path which is isolated from a circuit critical path (12). A scan input component (22) is coupled to the feedback path for providing scan test data to the latch circuit (10). A scan output component (23) may also be coupled to the feedback path for providing a separate scan out signal.