Patents Represented by Attorney, Agent or Law Firm Mark Seeley
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Patent number: 6407916Abstract: An improved computer assembly is disclosed, which includes a chassis that has at least one drive bay, the drive bay having an opening. A heat sink is positioned within the drive bay and a thermally conductive component is coupled to the heat sink and to a processor assembly. In a preferred embodiment, a heat pipe couples the thermally conductive component to the heat sink.Type: GrantFiled: June 12, 2000Date of Patent: June 18, 2002Assignee: Intel CorporationInventor: Rolf A. Konstad
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Patent number: 6350670Abstract: An improved method of forming a semiconductor device that has a carbon doped oxide insulating layer. The method comprises forming a first insulating layer that includes a carbon doped oxide, then forming on the surface of the first insulating layer a second insulating layer that comprises silicon dioxide.Type: GrantFiled: December 17, 1999Date of Patent: February 26, 2002Assignee: Intel CorporationInventors: Ebrahim Andideh, Sam Sivakumar, Larry Wong
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Patent number: 6294823Abstract: An improved integrated circuit and method for making it are described. The integrated circuit includes a shallow trench isolation structure formed adjacent to a well. A borderless contact makes electrical contact to a conductive region formed on the well and an insulating spacer is formed adjacent to a sidewall of the conductive region.Type: GrantFiled: May 12, 1999Date of Patent: September 25, 2001Assignee: Intel CorporationInventors: Mohamed Arafa, Scott Thompson
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Patent number: 6292366Abstract: A printed circuit board that includes first and second outer layers and a rigid core block that is positioned between those layers. An integrated circuit is positioned within the rigid core block and a heat pipe is formed within the rigid core block. The heat pipe is thermally coupled to the integrated circuit.Type: GrantFiled: June 26, 2000Date of Patent: September 18, 2001Assignee: Intel CorporationInventor: Richard Platt
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Patent number: 6291299Abstract: An improved method of forming an MOS transistor, which includes forming a polysilicon layer on a silicon dioxide layer, which is formed on a substrate. After etching the polysilicon and silicon dioxide layers to define a gate electrode and a gate oxide, dopants are implanted into the substrate. Following that implantation step, the exposed portion of the gate oxide is cleaned and sealed.Type: GrantFiled: October 14, 1999Date of Patent: September 18, 2001Assignee: Intel CorporationInventor: Charles Chu
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Patent number: 6263431Abstract: A method and apparatus for booting an operating system having at least one boot component comprising the steps of accessing an ordered list identifying the at least one boot component; accessing each of the at least one boot component using the ordered list; computing a first hash value from the at least one boot component; accessing a second hash value, the second hash value being secure; comparing the first hash value to the second hash value; and booting the operating system if the first hash value matches the second hash value.Type: GrantFiled: December 31, 1998Date of Patent: July 17, 2001Assignee: Intle CorporationInventors: John V. Lovelace, Bryon S. Nevis
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Patent number: 6261878Abstract: An integrated circuit and method for making it are described. The integrated circuit includes a first insulating layer formed on a substrate and a body strap of a first conductivity type that is formed on the first insulating layer. A second insulating layer is formed on the first insulating layer adjacent to the body strap and a film is formed on the second insulating layer. The integrated circuit also includes a gate electrode formed on the film. A plurality of doped regions of a second conductivity type are formed within the film that extend from the surface of the film to the surface of the second insulating layer. The doped regions have junctions that are each spaced from the body strap by at least about 500 angstroms.Type: GrantFiled: June 21, 1999Date of Patent: July 17, 2001Assignee: Intel CorporationInventors: Brian S. Doyle, Brian Roberds, Rafael Rios
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Patent number: 6238954Abstract: A semiconductor device having a multilayer laminate that includes a thermally stable, flexible polymer film, a semiconductor die, a molding compound, and a heat dissipation member. The die has an active surface and an inactive surface, in which the active surface includes a plurality of contacts. The molding compound contacts both the laminate and the die, but does not contact the die's active or inactive surfaces. The heat dissipation member contacts the die's inactive surface.Type: GrantFiled: September 28, 1999Date of Patent: May 29, 2001Assignee: Intel CorporationInventors: Qing Ma, Jin Lee, Chun Mu, Quat Vu, Jian Li, Larry Mosley
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Patent number: 6228777Abstract: An integrated circuit comprising a conductive region formed on a semiconductor substrate, a silicate glass layer formed on the conductive region, and an etch stop layer formed on the silicate glass layer. The integrated circuit also includes a borderless contact that is coupled to the conductive region.Type: GrantFiled: June 8, 1999Date of Patent: May 8, 2001Assignee: Intel CorporationInventors: Mohamed Arafa, Scott Thompson
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Patent number: 6177705Abstract: An improved MOS transistor and method for making it are described. The MOS transistor's source and drain have a first conductivity type and are separated from each other by a first region having a second conductivity type opposite to the first conductivity type. A second region, also having the second conductivity type, is formed adjacent to the drain and is separated from the first region by the drain.Type: GrantFiled: August 12, 1999Date of Patent: January 23, 2001Assignee: Intel CorporationInventors: Sunit Tyagi, Shahriar S. Ahmed
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Patent number: 6105137Abstract: A method and apparatus of authenticating and verifying the integrity of software modules is disclosed. In one embodiment, said software modules initially establish their corresponding credentials. Then said local software module ensures its integrity by validating its own digital signature. Said local software module authenticates the integrity of said partner software module after having derived and validated certain information from said partner module's credential. In addition, secure linkage between said local software module and said partner software module is maintained.Type: GrantFiled: July 2, 1998Date of Patent: August 15, 2000Assignee: Intel CorporationInventors: Gary L. Graunke, Carlos V. Rozas