Abstract: A bus control and error detection system is provided for a bus system in which data and address signals are transferred between a microsequencer and a number of operational stations which are coupled to the bus. Tri-state drivers are employed in the microsequencer and in the stations which are constructed such that two of the three states of these tri-state drivers are utilized to provide the two states of binary logic operation, and the third state is a high impedance state that protects the components that are coupled to the bus during predefined abort condition which are detected in the system. An abort detection circuit is included in each of the operational stations which is coupled to receive control signals from the microsequencer and which is constructed to emit an ABORT signal output to the microsequencer when the control signals indicate that an abort condition has occurred for the associated operational station.