Patents Represented by Attorney Martin G. Reiffin
  • Patent number: 4239810
    Abstract: A method of making silicon solar cells and other silicon photovoltaic cells. The method includes the steps of forming a silicon element having a metallic electrode coating on one surface of the element, applying to the other surface of the element a coating containing aluminum and silicon and heating the coated element at a temperature below the eutectic temperature of aluminum-silicon to form an antireflective coating of a fine matrix of silicon pyramids doped with aluminum. The matrix formed on the surface of the silicon has an overlying aluminum coating. A portion of the aluminum coating is removed to expose the matrix for use as a photovoltaic cell.
    Type: Grant
    Filed: November 13, 1978
    Date of Patent: December 16, 1980
    Assignee: International Business Machines Corporation
    Inventors: Oussama Alameddine, Marian Briska, Klaus P. Thiel
  • Patent number: 4204633
    Abstract: A path oriented decision making test pattern generator is embodied in a logic chip test system for testing large-scale integrated circuits having many internal nodes inaccessible to the test probes of chip testing machines. For each designated possible chip fault, consisting of a stuck-high or stuck-low voltage at a node of the chip logic network, the generator provides a test pattern of signals to be applied to the input pins of each chip, so that the resulting signal at an output pin indicates whether the fault is present in the chip.
    Type: Grant
    Filed: November 20, 1978
    Date of Patent: May 27, 1980
    Assignee: International Business Machines Corporation
    Inventor: Prabhakar Goel
  • Patent number: 4169001
    Abstract: A method for manufacturing a multilayer ceramic module structure is described which includes a ceramic body having a plurality of continuous glass channels within the body. The module transmits signals from point to point on the module and to points off of the module by allowing the movement of optical pulses through optical channels rather than the conventional electrical pulses and metal wiring.The method for fabricating the multilayer ceramic module includes providing a plurality of ceramic green sheets. The green sheets are then individually prepared for the circuit pattern plan for the module by opening via holes through certain locations of the various green sheets and forming grooves in other portions of the green sheets for a proper resulting pattern. A glass paste is applied to the green sheets to fill the grooves and the holes therein. The green sheets are then stacked and laminated by the use of suitable pressure. The laminated green sheets are then sintered to form a module package.
    Type: Grant
    Filed: November 11, 1977
    Date of Patent: September 25, 1979
    Assignee: International Business Machines Corporation
    Inventor: Harold D. Kaiser
  • Patent number: 4165539
    Abstract: A bidirectional serial-parallel-serial charge-coupled device wherein each serial section is both an input register and an output register, and serial streams of charge packets flow simultaneously in opposite directions in the parallel section. Odd data bits of a serial input stream flow into a first serial register and then through the parallel section in one direction and then out of the second serial register, while concurrently the even data bits flow into the second serial register and then through the parallel section in the opposite direction and then out of the first serial register. The data transfer rate is thereby substantially doubled.
    Type: Grant
    Filed: June 30, 1978
    Date of Patent: August 21, 1979
    Assignee: International Business Machines Corporation
    Inventor: Frederick J. Aichelmann, Jr.
  • Patent number: 4164668
    Abstract: A method and structure for correcting the voltage coefficient of resistance (VCR) of a resistor in a semiconductor body is described. The resistor may be diffused or ion implanted of one conductivity and formed in an isolated layer of the opposite type of conductivity. The layer is typically an epitaxial layer. A potential V.sub.1 is applied to one end of the resistor and a potential V.sub.2 being applied to the opposite end. The method provides means for controlling variations of the potential difference between the resistive region and the epitaxial layer, either to minimize them or to cause the distortions generated by such variations to be compensated for by equal distortions of opposite directions, such that the overall distortion will be equal to zero. There is provided means to cause the potential of the epitaxial layer to reach a suitable value, preferably a value that varies in the same manner as the average value of the resistor whose VCR is to be corrected.
    Type: Grant
    Filed: May 12, 1977
    Date of Patent: August 14, 1979
    Assignee: International Business Machines Corporation
    Inventors: Francois X. Delaporte, Robert M. Hornung, Anne-Marie Lamouroux, Gerard M. Lebesnerais, Jean-Paul J. Nuez