Patents Represented by Attorney, Agent or Law Firm Martin J. McKinley
  • Patent number: 5285296
    Abstract: An image processor converts white areas displayable on a video display screen to white areas outlined in black and suitable for printing on white paper. In addition, black areas that are displayed on a video screen are converted to white for printing on white paper.
    Type: Grant
    Filed: October 15, 1991
    Date of Patent: February 8, 1994
    Assignee: International Business Machines Corp.
    Inventors: Haruo Komooka, Toshifumi Matsuyama, Masao Mizuno
  • Patent number: 5265238
    Abstract: Apparatus and a method for automatically configuring communication port assignments in dockable portable computer systems wherein a portable computer unit is operable both on a stand-alone basis and attached (docked) to a generally stationary expansion (docking) unit providing extended connectivity and power sourcing facilities. The portable computer unit may contain integral connectors (RS232, telephone jacks, parallel port connectors, etc.) and internal circuit devices operating through the connectors (modems, circuits supporting RS232 signalling, etc.). The docking unit may also have such connectors and associated circuits. The computer user may assign internal logical communication paths com x (x=1, 2, . . . ) to these connectors and their associated circuits. When the portable unit is in a docked mode, care must be taken that duplicate paths are not concurrently active in the portable and docking units leading to potentially conflicting signal processes in the units.
    Type: Grant
    Filed: January 25, 1991
    Date of Patent: November 23, 1993
    Assignee: International Business Machines Corporation
    Inventors: Francis J. Canova, Jr., Neil A. Katz, Shaun Astarabadi, Robert L. Horton
  • Patent number: 5261107
    Abstract: A programmable interrupt controller having a plurality of interrupt request inquest inputs and an interrupt request output for connection to a central processing unit (CPU) includes means for interrupting the CPU over the interrupt request output responsive to an interrupt request from any one of the interrupt request inputs and a priority resolver for assigning a priority position to each of the interrupt request inputs to create an interrupt priority hierarchy. The interrupt controller is programmable such that each interrupt request input may be independently established as responsive to either edge-triggered or level-triggered interrupt requests on a per interrupt basis. An initialization command word register of the interrupt controller has a bit corresponding to each of the interrupt request inputs. Programming each of the bits of the register to one of two states determines whether corresponding interrupt request inputs are edge-sensitive or level-sensitive.
    Type: Grant
    Filed: January 23, 1992
    Date of Patent: November 9, 1993
    Assignee: International Business Machines Corp.
    Inventors: Peter J. Klim, Avery M. Lyford, Dennis L. Moeller
  • Patent number: 5230055
    Abstract: A battery operated portable personal computer includes ambient temperature (46) and humidity (48) sensors, as well as two LCD's (52) to provide visual indication that the ambient temperature or humidity is out of range. If the ambient temperature drops below 3 degrees C., or if it rises above 52 degrees C., the computer enters a low power suspend mode wherein the computer is inoperable, but, upon switching from the suspend mode to the resume (operating) mode, the application program that was running at the time of the suspension is resumed at the same point that the suspension occurred. The LCD temperature indicator is activated when the ambient temperature drops below 3 degrees C., or rises above 46 degrees C. Thus, for high temperatures, the temperature indicator is activated 6 degrees before the computer is placed in the suspend mode. The ambient temperature is periodically monitored while in the suspend mode and, if the temperature rises above 6 degrees C., or drops below 44 degrees C.
    Type: Grant
    Filed: January 25, 1991
    Date of Patent: July 20, 1993
    Assignee: International Business Machines Corporation
    Inventors: Neil A. Katz, Richard F. Pollitt, Leopoldo L. Suarez, C. William Frank
  • Patent number: 5230074
    Abstract: A computer has two processors. A main processor operates under the control of an operating system and provides overall control of the computer for executing application programs. The main processor also assists in power management by executing certain interrupts and controlling a power control register to turn power on and off to various devices. A power management processor monitors ambient temperature and humidity, and battery conditions, and generates interrupts as a result of predetermined changes. Such processor also controls charging of the battery. Logic means are responsive to predetermined conditions to also generate interrupts.
    Type: Grant
    Filed: January 25, 1991
    Date of Patent: July 20, 1993
    Assignee: International Business Machines Corporation
    Inventors: Francis J. Canova, Jr., Neil A. Katz, Richard F. Pollitt, Leopoldo L. Suarez, Shaun Astarabadi, C. William Frank
  • Patent number: 5228120
    Abstract: A display system having a display memory, a palette and a digital-to-analogue converter stage is able to support both an indirect color mode and a direct color mode. In the indirect color mode. pixel data from the display memory is used to access chrominance and/or luminance data from the palette for conversion in the converter stage into analogue values for controlling a display device. In the direct color mode. pixel data in the display memory directly specifies the chrominance and/or luminance data for conversion in the converter stage into analogue values for controlling the display device. In the direct color mode, however, the converter stage is also responsive to data from the palette for producing the analogue values for controlling the display device. The invention permits the provision of direct as well as indirect color modes in a flexible and efficient manner, with the provision of a plurality of formats for the direct color modes being achieved by loading appropriate information into the palette.
    Type: Grant
    Filed: July 13, 1992
    Date of Patent: July 13, 1993
    Assignee: International Business Machines Corporation
    Inventors: Robert W. E. Farr, deceased, David C. Haigh
  • Patent number: 5208908
    Abstract: A display system has, in addition to a display memory for the main storage of display information for a character mode, a separate cache for the temporary storage of the definitions of one or more fonts currently required for display and control logic for updating the font cache from the display memory. This enables the efficient support of a character mode on a display system, particularly where the display memory of that system is implemented with dual-ported memory technology. Compatibility with existing display standards is achieved.
    Type: Grant
    Filed: February 26, 1990
    Date of Patent: May 4, 1993
    Assignee: International Business Machines Corporation
    Inventors: Roy B. Harrison, David C. Haigh, Roger T. Wood
  • Patent number: 5189647
    Abstract: An information processing system operates under a multi-tasking operating system in which each task to be run is assigned a priority level. A Clock Switch (41) is positioned between the Clock Oscillator (50) and the Processor (10). A System Timer (70) establishes periodic intervals of time. At the beginning of each time interval, the System Timer, via an Interrupt Controller (60) and Transition Detector (42), turns ON (if its not already ON) the clock to the Processor by sending a Clock Start Signal to the Clock Switch. A Clock Control Program is assigned the lowest priority such that the Clock Control Program runs if and only if there are no other tasks running. When the Clock Control Program runs, it sends a code to a Register (43), which in turn sends a Clock Stop signal to the Clock Switch, thereby stopping the clock to the Processor. As described above, the System Timer will restart the clock again at the beginning of the next time interval.
    Type: Grant
    Filed: February 24, 1992
    Date of Patent: February 23, 1993
    Assignee: International Business Machines Corp.
    Inventors: Naoshi Suzuki, Shunya Uno
  • Patent number: 5170481
    Abstract: A logic circit external to a microprocessor monitors selected processor I/O pins to determine the current processor cycle and, in response to a hold request signal, drives the processor into a hold state at the appropriate time in the cycle. The logic circuit also includes a "lockbus" feature that, when the processor is not idle, "locks" the microprocessor to the local CPU bus for a predetermined period of time immediately after the processor is released from a hold state.
    Type: Grant
    Filed: June 19, 1989
    Date of Patent: December 8, 1992
    Assignee: International Business Machines Corporation
    Inventors: Ralph M. Begun, Patrick M. Bland, Mark E. Dean
  • Patent number: 5157286
    Abstract: A logic circuit is presented comprising a plurality of registers 30, 39; each register 30 having first register latches 31, 41 for clocking data into the register 30 in response to a first clock signal 37 and second register latches for clocking data out of the register in response to a second clock signal 38, and combinatorial logic comprising address logic 4 for addressing data to a register and first suppression logic 33 for inhibiting the first clock signal input to the register in response to the address logic, wherein the logic circuit further comprises second suppression logic 34, 35 for inhibiting the second clock signal input to the register in collective response to the address logic and the first clock signal.
    Type: Grant
    Filed: February 23, 1990
    Date of Patent: October 20, 1992
    Assignee: International Business Machines Corporation
    Inventors: Nicholas D. Butler, Roy B. Harrison
  • Patent number: 5157766
    Abstract: A computer graphics system includes display logic (92) comprising a destination bit map (11) containing a plurality of image bits which map to a plurality of pixels for presenting an image, an auxiliary bit map (1) containing a plurality of area boundary bits representing pixels defining an area boundary line which encloses an area of the image, area filling logic (7) for operating upon those image bits enclosed by the area boundary line in order to fill the area with a particular pattern and color, characterized in that the display logic further comprises area boundary drawing logic (5) having line segmentation means to resolve the specified boundary line into a plurality of intersecting two pixel line segments which can, from that time forward, be operated upon separately to define the area boundary bits in accordance with conventional area boundary drawing rules.
    Type: Grant
    Filed: February 23, 1990
    Date of Patent: October 20, 1992
    Assignee: International Business Machines Corporation
    Inventors: Nicholas D. Butler, Adrian C. Gay
  • Patent number: 5119480
    Abstract: A plurality of specialized controllers (e.g., 202, 204 & 206), each one adapted to control a particular type of data transfer operation, control the flow of data between a system bus (104) and a local bus (106) on a computer adapter card (102). When the Direct Memory Access (DMA) controller (202) is controlling a DMA operation on the local bus, certain other controllers (204 & 206) can break-in to the current DMA operation, temporarily halting the DMA opertion until the other controller has completed its data transfer operation. To break-in to a DMA operation, handshaking signals between the DMA controller and the local bus interface circuit (212) are temporarily blocked by blocking signals from a break-in logic circuit (210). The break-in circuit includes a four-state state machine to block the handshaking signals at the appropriate times, and to signal the interrupting controller to begin its data transfer operation.
    Type: Grant
    Filed: November 13, 1989
    Date of Patent: June 2, 1992
    Assignee: International Business Machines Corporation
    Inventors: Serafin J. E. Garcia, Jr., Douglas R. Chisholm, Dean A. Kalman, Russell S. Padgett, Robert D. Yoder
  • Patent number: D335030
    Type: Grant
    Filed: July 27, 1990
    Date of Patent: April 27, 1993
    Assignee: International Business Machines Corporation
    Inventor: Pedro M. Alfonso
  • Patent number: D337098
    Type: Grant
    Filed: July 26, 1990
    Date of Patent: July 6, 1993
    Assignee: International Business Machines Corp.
    Inventor: Pedro M. Alfonso
  • Patent number: D337106
    Type: Grant
    Filed: November 5, 1990
    Date of Patent: July 6, 1993
    Assignee: International Business Machines Corp.
    Inventor: Joseph E. Jasinski
  • Patent number: D339112
    Type: Grant
    Filed: January 25, 1991
    Date of Patent: September 7, 1993
    Assignee: International Business Machines Corporation
    Inventors: Hunter T. Foy, Frederick E. Goetz, Joseph E. Jasinski, David F. Loricchio, Michael S. Miller, Richard F. Pollitt, Homer Shelton, Jr.
  • Patent number: D341356
    Type: Grant
    Filed: June 18, 1991
    Date of Patent: November 16, 1993
    Assignee: International Business Machines Corporation
    Inventor: Kazuhiko Yamazaki
  • Patent number: D344935
    Type: Grant
    Filed: August 21, 1992
    Date of Patent: March 8, 1994
    Assignee: International Business Machines Corp.
    Inventors: Toshitaka Imai, Yoshiyuki Manabe, Tomoyuki Takahashi
  • Patent number: D345347
    Type: Grant
    Filed: August 21, 1992
    Date of Patent: March 22, 1994
    Assignee: International Business Machines Corp.
    Inventor: Kazuhiko Yamazaki
  • Patent number: D345349
    Type: Grant
    Filed: August 21, 1992
    Date of Patent: March 22, 1994
    Assignee: International Business Machines Corp.
    Inventors: Toshitaka Imai, Yoshiyuki Manabe, Tomoyuki Takahashi