Patents Represented by Attorney, Agent or Law Firm Mary Jo Bertani
  • Patent number: 8349666
    Abstract: A method for forming a semiconductor structure includes forming a plurality of fuses over a semiconductor substrate; forming a plurality of interconnect layers over the semiconductor substrate and a plurality of interconnect pads at a top surface of the plurality of interconnect layers; and forming a seal ring, wherein the seal ring surrounds active circuitry formed in and on the semiconductor substrate, the plurality of interconnect pads, and the plurality of fuses, wherein each fuse of the plurality of fuses is electrically connected to a corresponding interconnect pad of the plurality of interconnect pads and the seal ring, and wherein when each fuse of the plurality of fuses is in a conductive state, the fuse electrically connects the corresponding interconnect pad to the seal ring.
    Type: Grant
    Filed: July 22, 2011
    Date of Patent: January 8, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventors: George R. Leal, Kevin J. Hess, Trent S. Uehling
  • Patent number: 8252631
    Abstract: A method and device are disclosed in which a a lead-free or low-lead die attach material is applied to a surface. An electronic die is positioned on the die attach material. An oxide of at least a specified thickness is formed over an exposed portion of the die attach material. Wire bonds are formed between the electronic die and the surface, and an encapsulant material is applied over the surface, the oxide, and the electronic die.
    Type: Grant
    Filed: April 28, 2011
    Date of Patent: August 28, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jin-Wook Jang, Shun Meen Kuo
  • Patent number: 6808144
    Abstract: A parafoil recovery system capable of autonomously controlling the descent profile of a payload to a recovery area and maneuvering the parafoil to execute a soft landing in the recovery area is disclosed. A descent profile management system determines wind speed and direction, altitude, heading, and position of the payload based on sensor input. The descent profile management system also determines a gliding flight path profile from the launch point to the desired recovery area. A flare and stall maneuver is executed at the end of the landing sequence by braking the parafoil to slow the vertical descent speed and groundspeed for a soft landing. The pitch attitude of the payload can be adjusted by the descent profile management system to prevent nose-first impact with the ground. The parafoil canopy is released from the payload upon touchdown to prevent the canopy from dragging the payload on the ground after landing.
    Type: Grant
    Filed: December 26, 2002
    Date of Patent: October 26, 2004
    Assignee: Lockheed-Martin Corporation
    Inventors: Leland M. Nicolai, William R. Ramsey, Jr., Douglas J. Robinson
  • Patent number: 6797401
    Abstract: Electromagnetic wave absorbing materials comprising magnetic alloy particles and an insulating matrix are disclosed. The magnetic alloy particles comprise a transition metal such as Fe and/or Co, and further comprise at least one refractory metal such as Ti, V, Cr, Zr, Nb, Mo, Hf, Ta and W. The magnet alloy particles may further include Ni and/or Al, or other alloying additions which provide the desired absorption characteristics. In a preferred embodiment, the magnetic alloy particles comprise an Fe—Cr—Ni—Al alloy. The insulating matrix of the electromagnetic wave absorbing material may comprise a water miscible polysilicate or a refractory cement. The materials may be provided in the form of coatings that are applied to a substrate, such as the hot engine exhaust area of an aircraft. The electromagnetic wave absorbing materials are capable of functioning at very high temperatures for extended periods of time while retaining satisfactory electromagnetic wave absorbing properties.
    Type: Grant
    Filed: June 20, 2002
    Date of Patent: September 28, 2004
    Assignee: Lockheed-Martin Corporation
    Inventor: Dale P. Herron
  • Patent number: 6323971
    Abstract: A system and method for generating a composite display that includes at least one static three dimensional holographic image, and dynamic and/or static two dimensional images. An object hologram includes a three-dimensional object image. A silhouette hologram includes a silhouette image of the object, and can include a diffusion screen. The object hologram overlays the silhouette hologram with the object image substantially aligned with the silhouette image. Static and/or dynamic images can be projected on the diffusion screen or alternative background, forming a composite image that includes dynamic and/or static two-dimensional imagery combined with the static three-dimensional object image. The silhouette image thus provides a background for viewing the object image and occludes the two-dimensional imagery from the view of the object image.
    Type: Grant
    Filed: October 23, 2000
    Date of Patent: November 27, 2001
    Assignee: Zebra Imaging, Inc.
    Inventor: Michael A. Klug
  • Patent number: 6295204
    Abstract: A lock assembly for retaining computer peripheral devices in a housing. The lock assembly includes a spring-loaded lock bar that is movable between an unlock and a lock position. The lock bar is secured in the lock position by engaging a lock pin in one end of the lock bar. The lock pin is coupled for linear movement to a rotateable lock cylinder. A key is used to rotate the lock cylinder between lock and unlock positions. The key may be removed and stored in a secure place after locking the lock assembly to prevent unauthorized removal of peripheral devices from the housing. Brackets are mounted on opposing sides of the housing to retain the lock bar and to provide guide slots for controlling movement of the lock bar between lock and unlock positions.
    Type: Grant
    Filed: April 26, 1999
    Date of Patent: September 25, 2001
    Assignee: Dell USA, L.P.
    Inventors: Clifford A. Gibbons, Steven L. Sands, Timothy Radloff
  • Patent number: 6285405
    Abstract: A system for dynamically determining and introducing time delay values for synchronizing different data signals. For transmitting the data signals, encoding time delay is measured in one encoder, a target encoder time delay value is determined, and the target encoder time delay value is utilized in another encoder to delay transmission of one data signal relative to the transmission of the other data signal. When encoded data signals are received and processed for presentation, the time required to decode a first data signal in a first decoder is measured, a target decoder time delay value is determined based on the time required to decode the first data signal, and the target decoder time delay value is utilized to delay presentation of a second data signal relative to the presentation of the first data signal.
    Type: Grant
    Filed: October 14, 1998
    Date of Patent: September 4, 2001
    Assignee: VTEL Corporation
    Inventors: Donald D. Binford, Jr., Matthew W. Korte, William J. Jackman
  • Patent number: 6281718
    Abstract: A switched converter uses two series connected complementary CMOS devices and has a square wave source for activating one CMOS device while deactivating the other; and a break before make circuit connected between the square wave source and said complementary CMOS devices to ensure that one device is substantially completely off before the other device turns on. The switched converter is programmable as to frequency, phase and duty cycle.
    Type: Grant
    Filed: September 16, 1998
    Date of Patent: August 28, 2001
    Assignee: Cirrus Logic, Inc.
    Inventors: Joel Page, Edwin De Angel, Wai Laing Lee, Lei Wang, Hong Helena Zheng, Chung-Kai Chow
  • Patent number: 6282087
    Abstract: An assembly including a slot in a peripheral device carrier and a tab in a housing for peripheral devices, the assembly providing a structure for retaining compatible peripheral devices in a computer system, and for preventing damage to connectors when an attempt is made to install an incompatible peripheral device. The peripheral devices include a first connector portion for electronically coupling the peripheral device to a processor in a computer system. The peripheral device is installed in the peripheral device carrier that includes a slotted side member and a front member. The slot may be located at one end of the side member, or the side member may be shortened or truncated to avoid the tab when the device carrier is inserted. The side member is attached to the front member thereby forming a portion of a frame for receiving the peripheral device. The housing includes a bay having a second connector portion and at least one opening for receiving the peripheral device carrier.
    Type: Grant
    Filed: December 15, 1998
    Date of Patent: August 28, 2001
    Assignee: Dell USA, L.P.
    Inventors: Clifford A. Gibbons, Timothy C. Dearborn
  • Patent number: 6215656
    Abstract: An apparatus and method is provided for installing and connecting one or more expansion boards in a computer system while the computer system is being manufactured as well as when a user upgrades or reconfigures the computer system. An expansion board bay for receiving the expansion board is located within the computer system, typically on a circuit board such as the motherboard. A connector module that is separate from the expansion board and the expansion board bay is positioned within the computer system. The connector module is positioned to provide easy external access to a contact portion of the connector module, thereby allowing a user to connect an external data signal line to the connector module. A connector cable operably connects the expansion board with the connector module to establish communication between the data processor and the external data line through the expansion board.
    Type: Grant
    Filed: June 18, 1999
    Date of Patent: April 10, 2001
    Assignee: Dell USA, L.P.
    Inventors: Sean P. O'Neal, Reynold L. Liao, Mark A. White
  • Patent number: 6194867
    Abstract: A battery charging apparatus, computer system and method provide current from a single power line to charge either a first battery or multiple batteries in an independent mode or a simultaneous mode. The apparatus includes an AC-to-DC adapter, the power line, and a battery charging control system that measures the charge of the individual batteries and compares the measured charge. If the charging system detects a difference in charge between the batteries, the lowest or the lower charged batteries are charged until the charging system detects no difference in charge, and then resumes simultaneous charging. The battery charging control system also includes a comparator circuit that determines whether to enable charging in the independent mode or the simultaneous mode based on input from a user or input from a computer system. The computer system includes a processor, a memory, a bus, a power line, and a battery charging apparatus coupled to the power line.
    Type: Grant
    Filed: January 22, 1999
    Date of Patent: February 27, 2001
    Assignee: Dell USA, L.P.
    Inventors: John Cummings, Barry Kates
  • Patent number: 6188602
    Abstract: An apparatus for accessing locked-down flash memory in a computer system that utilizes a general purpose input/output port coupled to the flash memory, and includes program instructions that generate a reset signal, output the reset signal to the general purpose input/output port, sense the reset signal, unlock the flash memory to allow write access to the flash memory, update the flash memory, and lock the flash memory to locked down mode. The present invention allows flash memory to be updated during normal operation of the computer system.
    Type: Grant
    Filed: January 25, 2000
    Date of Patent: February 13, 2001
    Assignee: Dell USA, L.P.
    Inventors: Marc D. Alexander, Todd Martin
  • Patent number: 6172883
    Abstract: A switching flyback regulator circuit for providing a plurality of regulated DC voltage power supplies. The flyback regulator circuit includes a primary inductive element coupled in series with a first switch to turn charging current flow through the primary inductive element ON and OFF. A first secondary inductive element having a first end coupled to supply a first power source. A second secondary inductive element has a first end coupled to produce the second power source, and a second end coupled to a second switch to turn current flow through the second secondary inductive element ON and OFF. The first secondary inductive element and the second secondary inductive element are magnetically coupled to the primary inductive element.
    Type: Grant
    Filed: January 22, 1999
    Date of Patent: January 9, 2001
    Assignee: Dell USA, L.P.
    Inventors: Barry K. Kates, John Cummings
  • Patent number: 6092504
    Abstract: The present invention is an apparatus for controlling the fuel rate to an engine using the throttle position, and for controlling the speed of the engine using decision logic to choose the best alternative among candidate fuel levels. A minimum speed governor determines a minimum fuel level at a predetermined low idle engine speed, a maximum speed governor determines a maximum fuel level at a predetermined high idle engine speed, and at least one fuel rate map is used to determine fuel level based on various engine operating parameters. Each governor outputs a fuel quantity signal based on the difference between the corresponding desired engine speed and the actual engine speed. The fuel rate map may be a multi-dimensional data table that provides fuel quantity signals to optimize engine performance based on the throttle position, engine speed, boost pressure, and other engine operating states.
    Type: Grant
    Filed: August 4, 1998
    Date of Patent: July 25, 2000
    Assignee: Caterpillar Inc.
    Inventors: Travis E. Barnes, Michael S. Lukich, Scott E. Nicholson
  • Patent number: 6073592
    Abstract: In one embodiment of the present invention an apparatus for controlling one or more engines by synchronizing the functions of two or more electronic control modules includes a master electronic control module, one or more slave electronic control modules, and one or more data links for transferring data between the electronic control modules. Engine control and monitoring functions are divided between the master electronic control module and the slave electronic control modules. The present invention may be used to control and monitor dual fuel engines and engines that operate on one type of fuel. The master electronic control module may transition operation of the engine to the diesel fuel only mode in the event of a failure of any dual fuel mode specific components. The master ECM coordinates timing and speed of fuel injection to engine cylinders using input from an adjustable engine speed command device and a speed sensor connected to each engine.
    Type: Grant
    Filed: March 6, 1998
    Date of Patent: June 13, 2000
    Assignee: Caterpillar Inc.
    Inventors: Scott C. Brown, Raymond G. Evans, James B. Maddock, Shawn J. Weck
  • Patent number: 5920004
    Abstract: A method of calibrating an injector driver system including an injector driver circuit, a logic device connected to an input line of the injector driver circuit, and an information storage device associated with the logic device, involves testing the injector driver circuit once assembled. A predetermined test is connected to the injector driver circuit. A pulse width modulated signal having a predetermined duty cycle is applied to the input line of the injector driver circuit and the corresponding current level through the test load is measured. A value indicative of the measured current level is stored in the information storage device for later retrieval during operation of the injector driver system.
    Type: Grant
    Filed: May 13, 1997
    Date of Patent: July 6, 1999
    Assignee: Caterpillar Inc.
    Inventors: Paul C. Gottshall, Ricky L. Crebo