Abstract: Disclosed is a cable modem termination system (CMTS) capable of outputting periodic ranging opportunities. The CMTS includes an upstream receiver and demodulator capable of receiving an upstream signal, a downstream transmitter and modulator capable of transmitting a downstream signal, and a processor. The processor is arranged to output a first periodic ranging opportunity after a first polling interval from the downstream transmitter and modulator and to output a second periodic ranging opportunity after a second polling interval if the upstream receiver has not received a periodic ranging request in response to the first periodic ranging opportunity, wherein the second polling interval is shorter than the first polling interval. In one implementation, the first polling interval plus the second polling interval are less than a disconnect interval after which a cable modem that is communicating with the upstream receiver disconnects.

Abstract: Disclosed are methods and apparatus for sampling defects. A test chip having a plurality of test structures is provided that is designed so that defect sampling may be customized to obtain different critical areas from the test chip. Each test structure is conceptually divided into a plurality of unit cells (e.g., a pair of grounded and floating conductive lines). The defects of a percentage of unit cells may then be sampled for each test structure to conceptually form a sub test structure that has a different size than the original test structure. The percentage of unit cells that are sampled for each test structure is chosen so as to achieve a specific critical area curve. The defects from each sampled set of unit cells may then combined to determine yield for a product chip having the same specific critical area curve.

Abstract: Disclosed are methods and apparatus for generating reference images to reduce the number of false defects found when comparing a reference image to a corresponding target image of a reticle or mask (or integrated circuit). In one specific implementation, parameters that characterize the reticle making process are collected from a representative reticle or reticle. These parameters are collected (e.g., measured) from a reticle prior to inspection of the reticle. The collected parameters are then used to simulate process effects on the reference images of the design data. After the layout data is altered to simulate process effects and represent a “real” layout after it has been fabricated into a mask, this “real” layout data is then altered again to simulate imaging effects. The resulting reference images now include both processing and imaging effects and may then be used during an inspection of a corresponding reticle or integrated circuit.

Abstract: Disclosed are mechanisms for selectively filtering spatial portions of light emanating from a sample under inspection within an optical system. In one embodiment, a programmable spatial filter (PSF) is constructed from materials that are compatible with light in a portion of the UV wavelength range. In a specific implementation, the PSF is constructed from a UV compatible material, such as a polymer stabilized liquid crystal material. In a further aspect, the PSF also includes a pair of plates that are formed from a UV grade glass. The PSF may also include a relatively thin first and second ITO layer that results in a sheet resistance between about 100 and about 300 &OHgr; per square.

Abstract: Disclosed are mechanisms for selectively filtering spatial portions of light emanating from a sample under inspection within an optical system. In one embodiment, a programmable spatial filter (PSF) is constructed from materials that are compatible with light in a portion of the UV wavelength range. In a specific implementation, the PSF is constructed from a UV compatible material, such as a polymer stabilized liquid crystal material. In a further aspect, the PSF also includes a pair of plates that are formed from a UV grade glass. The PSF may also include a relatively thin first and second ITO layer that results in a sheet resistance between about 100 and about 300 &OHgr; per square. The PSF provides selective filtering in two directions. In other words, the PSF provides two dimensional filtering.

Abstract: Methods and apparatus are disclosed for enabling a first one of a plurality of interfaces associated with a router. In one aspect of the invention, a method is disclosed. The first interface is enabled when a first predefined operating condition is met. In one alternative embodiment, the first predefined operating condition is met when the first interface has been disabled for at least a programmable predefined minimum time. In another embodiment, the first predefined operating condition is met when the first interface device has been disabled for more than a programmable predefined maximum time. In yet another embodiment, the first predefined operating condition is met when a programmable predefined amount of processing resources are available for implementing a plurality of processes on the network router.

Abstract: Disclosed is a method and apparatus for generating an image from a sample. The apparatus includes a charged particle beam generator arranged to generate and control a charged particle beam substantially towards a portion of the sample and a detector arranged to detect charged particles originating from the sample portion to allow generation of an image from the detected charged particles. The apparatus further includes a measurement device arranged to measure a characteristic of the sample portion to obtain a surface voltage value of the sample portion that is exposed to the charged particle beam. For example, the measurement device is an electrostatic voltmeter positioned to obtain a surface voltage value of the exposed sample portion. A charged particle beam is directed substantially towards a portion of the sample under a first set of operating conditions. A surface charge value of the sample portion is obtained under the first set of operating conditions.

Abstract: Disclosed is a method of inspecting a reticle defining a circuit layer pattern that is used within a corresponding semiconductor process to generate corresponding patterns on a semiconductor wafer. A test image of the reticle is provided, and the test image has a plurality of test characteristic values. A baseline image containing an expected pattern of the test image is also provided. The baseline image has a plurality of baseline characteristic values that correspond to the test characteristic values. The test characteristic values are compared to the baseline characteristic values such that a plurality of difference values are calculated for each pair of test and baseline characteristic values. Statistical information is also collected.

Abstract: Disclosed is a method of inspecting a reticle for defects that occur over time. The invention accomplishes this by generating and storing a “baseline” image of the reticle and then periodically generating a “current” image of the reticle and comparing the current and baseline images. The baseline image is taken at a time when the reticle is known to be acceptable. This may be when the reticle has been “qualified” by an optical test or when a die fabricated by reticle has passed an electrical test. Also disclosed in a method for compacting the baseline image before storage.

Abstract: Disclosed is an apparatus for inspecting a sample. The apparatus includes a first electron beam generator arranged to direct a first electron beam having a first range of energy levels toward a first area of the sample and a second electron beam generator arranged to direct a second electron beam having a second range of energy levels toward a second area of the sample. The second area of the sample at least partly overlaps with the first area, and the second range of energy levels are different from the first range such that charge build up caused by the first electron beam is controlled.

Abstract: Disclosed are methods and apparatus for generating a test recipe for a metrology tool is disclosed. A plurality of first reference images that are designed to be used to fabricate a plurality of structures on a sample are provided. Each structure is imageable to form a plurality of target image patterns. A test recipe for use by a metrology tool in locating the structures on the sample is generated or modified. Generating or modifying the test recipe includes forming a plurality of second references images from the first reference images and associating the second reference images with the test recipe. The second reference images are formed to at least partially simulate one or more process effect(s) associated with fabricating the structures of the sample. Additionally, the second reference images may also be formed to simulate one or more imaging effects.

Abstract: A method and apparatus for generating an image of a specimen with a scanning electron microscope (SEM) is disclosed. The SEM (200) has a source unit (202 through 220) for directing an electron beam (203) substantially towards a portion of the specimen (222), a detector (224) for detecting particles (205) that are emitted from the specimen (222), and an image generator (234 through 242) for generating the image of the specimen (222) from the emitted particles (205). The image features are controlled by conditions under which the image is generated. The specimen is scanned under a first set of conditions (252) to generate a first image during a first image phase (302, 402). The specimen is then scanned under a second set conditions (254) during a setup phase (304, 404). The second set of conditions is selected to control charge on the specimen. The specimen is then scanned under the first set of conditions (252) to generate a second image during a second image phase (306, 406).

Abstract: A sample is inspected. The sample is scanned in a first direction with at least one particle beam. The sample is scanned in a second direction with at least one particle beam. The second direction is at an angle to the first direction. The number of defects per an area of the sample are found as a result of the first scan, and the position of one or more of the found defects is determined from the second scan. In a specific embodiment, the sample includes a test structure having a plurality of test elements thereon. A first portion of the test elements is exposed to the beam during the first scan to identify test elements having defects, and a second portion of the test elements is exposed during the second scan to isolate and characterize the defect.

Abstract: A feedback-based adaptive network is described wherein at least a portion of the network elements report operating information relating to network conditions to a centralized data store. The information which is reported to the data store is analyzed by a policy engine which includes a plurality of application specific plug-in policies for analyzing selected information from the data store and for computing updated control information based upon the analysis of the information. The updated control information is fed back to selected network elements to thereby affect operation of the selected elements. Typically, when the operation of a network element has been affected, its corresponding operating information will change. The new or changed network element operating information is then reported to the data store and analyzed by the policy engine. The policy engine may then generate new or updated control information for affecting the operation of selected elements in the network.

Abstract: A reusable circuit design for use with electronic design automation EDA tools in designing integrated circuits is disclosed, as well as reticle inspection and fabrication methods that are based on such reusable circuit design. The reusable circuit design is stored on a computer readable medium and contains an electronic representation of a layout pattern for at least one layer of the circuit design on an integrated circuit. The layout pattern includes a flagged critical region which corresponds to a critical region on a reticle or integrated circuit that is susceptible to special inspection or fabrication procedures. In one aspect of the reusable circuit design, the special analysis is performed during one from a group consisting of reticle inspection, reticle production, integrated circuit fabrication, and fabricated integrated circuit inspection.

Abstract: Disclosed is a semiconductor die having a scanning area. The semiconductor die includes a first plurality of test structures wherein each of the test structures in the first plurality of test structures is located entirely within the scanning area. The semiconductor die further includes a second plurality of test structures wherein each of the test structures in the first plurality of test structures is located only partially within the scanning area. The test structures are arranged so that a scan of the scanning area results in detection of defects outside of the scanning area.

Abstract: Disclosed is, a method for detecting electrical defects on test structures of a semiconductor die. The semiconductor die includes a plurality of electrically-isolated test structures and a plurality of non-electrically-isolated test structures. Voltages are established for the plurality of electrically-isolated test structures. These voltages are different than the voltages of the plurality of non-electrically-isolated test structures. A region of the semiconductor die is continuously inspected in a first direction thereby obtaining voltage contrast data indicative of whether there are defective test structures. The voltage contrast data is analyzed to determine whether there are one or more defective test structures.

Abstract: Disclosed is a method of generating an integrated circuit (IC) layout design. An initial layout netlist having a plurality of original cells is provided. A first original cell within the initial layout netlist is replaced with a first replacement cell having a different drive than the first original cell's drive but a same replacement delay as the first original cell when the first original cell is not optimal. The first replacement delay of a particular cell is the particular cell's total delay contribution to a particular delay path that includes the particular cell.

Abstract: Disclosed is a method of inspecting a reticle defining a circuit layer pattern that is used within a corresponding semiconductor process to generate corresponding patterns on a semiconductor wafer. A test image of the reticle is provided, and the test image has a plurality of test characteristic values. A baseline image containing an expected pattern of the test image is also provided. The baseline image has a plurality of baseline characteristic values that correspond to the test characteristic values. The test characteristic values are compared to the baseline characteristic values such that a plurality of difference values are calculated for each pair of test and baseline characteristic values. Statistical information is also collected.

Abstract: In a router or packet processing node supporting Mobile IP, a method for causing packets to be retransmitted from a sender to a mobile node is disclosed. A plurality of packets having associated update information are received. The packets are intended for the mobile node. The update information associated with at least one of the received packets is stored. When the mobile node is disconnected from the sender and reconnects to the sender, without waiting for a timeout the sender is directed to retransmit a last portion of packets to the mobile node based on the stored update information. Apparatus and computer readable medium embodiments are also disclosed.