Patents Represented by Attorney Masanori Hono
  • Patent number: 5499210
    Abstract: A low power consumption semiconductor memory device that can read stored data at a faster access time, while minimizing power consumption is provided. In accordance with the logic states on a pair of bit lines on which an information signal stored in the memory cell and an inverted version of that information signal are placed, it is detected that the information signal is placed onto the bit line, and then the information signal on that bit line is read onto the data signal bus.
    Type: Grant
    Filed: March 10, 1995
    Date of Patent: March 12, 1996
    Assignee: Motorola, Inc.
    Inventor: Tadashi Usami