Abstract: The invention provides a substrate and high-density pixel array for use in liquid crystal displays (LCDs). The pixels are formed using integrated circuit (IC) processes on silicon-on-insulator (SOI) substrates and include thin film transistors (TFTs) formed in single-crystal silicon. Instead of bonding a layer of single-crystal silicon to a separate transparent substrate made of glass, quartz, or another transparent material, or partially crystallizing silicon deposited on a substrate, the invention employs a unitary SOI wafer substrate having a buried insulating layer of silicon dioxide. A high-density pixel array comprising rows and columns of pixel electrodes, each controlled by a TFT, is formed in the surface layer of the substrate. The bulk silicon supporting layer, beneath the pixel array, on the opposite side of the insulating layer of the substrate, is removed. The resultant substrate includes a pixel array and a supporting layer of silicon dioxide.

Abstract: A method of forming conducting diffusion barriers is provided. The method produces substantially amorphous conducting diffusion barriers by depositing materials with varying ratios of elements throughout the diffusion barrier. Diffusion barriers of metal nitride, metal silicon nitride, are deposited using CVD, PECVD, or ALCVD, by depositing material with a first ratio of elements and then depositing substantially identical material with a different ratio of elements. The actual elements used are the same, but the ratio is changed. By changing the ratio of the elements within the same diffusion barrier, density variations are produced, and the material is not able to form undesirable polycrystalline structures.

Abstract: A method is provided for forming an intermediate level in an integrated circuit dielectric during a damascene process using a photoresist mask having an intermediate thickness. The method forms an interconnect to a first depth in the dielectric through an opening in the photoresist pattern. The photoresist profile is partially etched away in the area of the intermediate thickness to reveal a second dielectric surface area. The second dielectric surface area is then etched to a second depth less than the first depth. In this manner, vias can be formed to the first depth, and lines can be formed at a second depth to intersect the vias. The method of the present invention allows a dual damascene process to be performed with a single step of photoresist formation.