Abstract: In a semiconductor device in which a plurality of substrates each mounting a semiconductor chip are stacked, one ends of the leads formed on the substrates are connected to the semiconductor chip and the other ends thereof are connected to connection terminals of the substrates. At least one of the leads are branched into two or more in the vicinity of the connection terminals, and one ends of the branched leads are connected to the connection terminals. A technique for sorting good products is performed in a state in which the chips are mounted on the substrates.

Abstract: Multiple key ranges are correlated with multiple data storage areas provided in memory. In storing data in a database, the data is stored in the data storage area correlated with the key range containing the data. When the addition of a data storage area as mentioned above is needed, a given volume of data is moved from the multiple data storages to the newly added data storage area and the key ranges for the moved data are correlated with the data storage areas.

Abstract: A virtual intermediate data is prepared between the input data and the output data by an operator himself. The operator defines a first conversion rule for converting the input data into the intermediate data and a second conversion rule for converting the intermediate data into the output data and derives a conversion rule for directly converting the input data into the output data on the basis of the first and second conversion rules. This makes it easy to define and maintain the data conversion rule for transmitting the data among a plurality of systems and further improve the processing efficiency of the conversion.

Abstract: The object of the invention is to improve data access performance in a computer system. At least one logical volume is provided in a storage device 13 connected to a host computer via a network 17, and two different paths, a first path and a second path, which are unique to that logical volume, are assigned to the logical volume. The storage device 12 comprises: means for performing data access with respect to the logical volume identified by the first path, if a data access request from the host computer 12 has been received via the first path; and means for carrying out, if a data access request has been received from the host computer 12 via the second path, a prescribed processing before the received data access, and then performing data access with respect to the logical volume identified by the second path.

Abstract: An information processing system has: information processing apparatus installed at each site, the apparatuses being interconnected with each other; fail-over processor realized by program executed by a processing apparatus, wherein when failure occurs, the fail-over processor performs to fail-over of making another different from the processing apparatus hit by the failure inherit processes executed by the processing apparatus hit by the failure; a recovery capability judge for judging whether essential data is managed in recoverable state at any processing apparatus excepting the processing apparatus hit by the failure, when the fail-over is executed passing from the processing apparatus hit by the failure to the other, the essential data necessary for performing fail-over; and backup data generator for generating backup data necessary for recovering the essential data if the data is not managed in recoverable state.

Abstract: An object is detected in comparison between an input image from an image pick-up device having a zoom mechanism and a template image stored in a manner that a first image within a view field of the image pick-up device is stored as a first as the template image, a power of the zoom mechanism to be changed is recorded, a second image to be detected is picked-up from the image pick-up device. Then, a size of either one of the template image and the second image is changed on the bases of the changed power of the zoom mechanism, and a template matching is performed between the template image and the second image to detect the object. This process makes it possible to track an object within the view field.

Abstract: The invention has an object of enhancing the service capacity and the operability of a network and simplifying the maintenance and control of the network by adopting a size automatic change mode after a path is set and providing arbitrary pathsize at arbitrary time. To achieve the object, the following means is provided. The service capacity and the operability of a network are enhanced and the maintenance and control of the network are simplified by adopting a size automatic change mode that the size of an input path signal conforms to information written to line overhead H1 and H2 bytes and an output path signal is transmitted with the pathsize the same as the size of the input path signal. A case that receiving path size changes exceeding a band and the fault of a path is caused occurs by providing both modes of fixing pathsize and automating pathsize to a user, flexibly corresponding to various service and automatically changing pathsize.

Abstract: Periodic process scheduling method of computer system includes steps of receiving requests for periodical execution of processes each with period of execution and execution time, securing allocation time for process having shorter period than the other processes to be executed in each of respective periods of execution for process, securing another allocation time for part of another process within first of respective periods of execution of process other than allocation time in first of the allocation time for process if full execution time of another process cannot be secured within first of respective periods of execution of process, and starting execution of process in secured allocation time and another process in secured another allocation time.

Abstract: The electrophoresis apparatus has plural capillaries for separating fluorephore-labeled samples by electrophoresis, fluorescence detecting parts provided in a part of these capillaries arranged in the same plane for detecting fluorescence emitted by fluorephore labels when a part of the plural capillaries is scanned and irradiated by a laser beam, and a fluorescence detection system for detecting this fluorescence. The fluorescence detecting parts are scanned and repeatedly irradiated by the laser beam where a scanning period of the fluorescence detecting parts by the laser beam is t1, and the fluorescence is detected by the fluorescence detecting system where an acquisition time of fluorescence signal is t2 (t1?t2). The laser beam from a laser source is narrowly converged by a light collecting lens, and a galvanomirror is rotated in a rotation directional of the galvanomirror around the rotation axis of the galvanomirror so as to repeatedly scan the fluorescence detecting parts.

Abstract: In a pump turbine which can be operated in a pumping mode or a generating mode by switching the rotating direction of a runner, the discharge passing through the runner is adjusted based on a wicket gate opening; the speed of the runner is sensed; a target speed is temporarily set to a first speed different from a rated speed on generation starting; a response speed of a speed control via discharge adjusting means is controlled to a lower level after the speed reaches the target speed than that before the speed reaches the target speed; and finally, the target speed is slowly led to the rated speed, thus enhancing the stability of the speed when the turbine is started and enlarging a head range in which synchronization is achieved.

Abstract: A gas-insulated switch equipped with a fixed contact and a moving contact that can contact with and separate from the fixed contact, wherein a single shock absorber absorbs the shock in both the breaking action and the closing action of the moving contact.

Abstract: A semiconductor integrated circuit include a logic circuit which is formed of p-channel MIS transistors and n-channel MIS transistors, a first oscillation circuit of variable oscillation frequency which is formed of p-channel MIS transistors and n-channel MIS transistors, a control circuit which produces a control signal for controlling the threshold voltage of the p-channel and n-channel MIS transistors, and a second oscillation circuit which produces multiple reference clock signals of different frequencies depending on the operation mode. The control circuit receives a reference clock signal and controls first oscillation circuit with the control signal so that the oscillation frequency of the first oscillation circuit corresponds to the frequency of the reference clock signal.

Abstract: A program making method comprises the steps of displaying figures representative of a plurality of objects, inputting a command train which includes a plurality of processing commands each designating at least one of the objects and a processing to be executed for that object and forms a program to be made, executing each processing command so that a processing designated by that command is executed for example data of an object designated by the command each time the command is inputted, and changing the display of a figure representative of an object designated by each of at least some of the processing commands by processing figure data concerning the figure when that command has been executed.

Abstract: Disclosed herein is a communication module, comprising a semiconductor chip in which channels for allowing signal converting means to convert current signals inputted from input terminals to voltage signals and outputting the same from output terminals respectively are arranged in parallel in plural form, and wherein the semiconductor chip is comprised principally of a semiconductor substrate in which a second semiconductor layer is provided on a first semiconductor layer with an insulating layer interposed therebetween, each of the signal converting means is formed in a channel forming region of the second semiconductor layer, which is defined for each channel, and the input and output terminals are formed on the channel forming regions of the second semiconductor layer with the insulating layer interposed therebetween.

Abstract: Leakage fluxes from windings and leads of a stationary induction apparatus are confined within a tank. The stationary induction apparatus includes an electric functional units each including a winding and a core, a tank containing the electric functional units, high-voltage leads leading out from the windings, and low-voltage leads leading out from the windings. Magnetic shields are placed on the inner surface of a wall of the tank through which the high-voltage leads are drawn out of the tank, and a composite shield formed by combining nonmagnetic shields and magnetic shields is placed on the inner surface of a wall of the tank facing the low-voltage leads and is electrically short-circuited.

Abstract: In the transmission of a logic signal, there is a reduced maximum value and a reduced average value of the number of bits varied by transforming an input level representation original logic signal having n bits into a transition representation logic signal of m groups with only a maximum of k bits varied, wherein k and m are integer numbers, n is greater than k and each value of k and m is greater than 1. The transformed logic signal of m groups is transmitted. The transmitted logic signal of m groups is then transformed into the original logic signal having n bits. A maximum number of bits varied is k, which can be below n/2 as a maximum, which is less than an average bit variation of the input original signal.

Abstract: A semiconductor integrated circuit including an input circuit constituted as a single-input differential circuit which has a first MOSFET to whose gate a reception signal with a small amplitude with respect to a power supply voltage is supplied and a second MOSFET to whose gate a reference voltage corresponding to an intermediate value of the reception signal is supplied. A dummy circuit is provided and transmits substantially the same power supply noise as the power supply noise transmitted to the gate of the first MOSFET through a electrostatic protection circuit provided to an external terminal which receives the reception signal.