Patents Represented by Attorney Maurice H. Klitzman
  • Patent number: 5333287
    Abstract: A mechanism translates a particular macroinstruction into its associated microprogram routine in a general purpose microprogrammed computer. The macroinstruction is capable of execution by either hardware or by microprogram. A table-look up approach is employed for a microprogrammed macroinstruction. The table is embedded in random-access-memory and contains entries representing the origins of various microprogram routines to execute the macroinstruction. The table entries are addressed by bits generated from the operation-code of the macroinstruction. The output of the table is used to address a single level control store containing the microprogram routines. Hardware is assembled in a single facility that is accessible by the microprogram routines to minimize the size of the microprogram routines required to execute the macroinstruction.
    Type: Grant
    Filed: February 23, 1993
    Date of Patent: July 26, 1994
    Assignee: International Business Machines Corporation
    Inventors: Daniel J. Buerkle, Agnes Y. Ngai
  • Patent number: 5148538
    Abstract: This invention implements a cache access system that shortens the address generation machine cycle of a digital computer, while simultaneously avoiding the synonym problem of logical addressing. The invention is based on the concept of predicting what the real address used in the cache memory will be, independent of the generation of the logical address. The prediction involves recalling the last real address used to access the cache memory for a particular instruction, and then using that real address to access the cache memory. Incorrect guesses are corrected and kept to a minimum through monitoring the history of instructions and real addresses called for in the computer. This allows the cache memory to retrieve the information faster than waiting for the virtual address to be generated and then translating the virtual address into a real address.
    Type: Grant
    Filed: October 20, 1989
    Date of Patent: September 15, 1992
    Assignee: International Business Machines Corporation
    Inventors: Joseph O. Celtruda, Kein A. Hua, Anderson H. Hunt, Lishing Liu, Jih-Kwon Peir, David R. Pruett, Joseph L. Temple, III
  • Patent number: 5114518
    Abstract: A multilayer circuit board having a conformal layer of an insulating material separating a circuit core from an adjacent insulating layer is disclosed. The conformal layer encapsulates the substrate and conductive pattern of circuit lines in the circuit core, thereby reducing failures caused by impurities trapped during lamination. The multilayer circuit board is manufactured by coating at least one circuit core with the conformal layer of insulating material before final lamination of the circuit cores into a multilayer circuit board.
    Type: Grant
    Filed: January 10, 1990
    Date of Patent: May 19, 1992
    Assignee: International Business Machines Corporation
    Inventors: Joseph G. Hoffarth, Donald J. Lazzarini, John A. Welsh, John P. Wiley
  • Patent number: 5058997
    Abstract: The invention is an improvement in a liquid crystal display device of the type having spaced front and rear glass panels, a transparent electrode layer, and an array of individually addressable pel electrodes separated from the transparent electrode layer by a cavity filled with liquid crystal material. The improvement comprises a color filter layer in the form of a decal pattern. The decal pattern is formed using interference film techniques which form an inorganic color filter. The decal is placed on one of the glass panels using known decal transfer methods. The inorganic nature of the color filter layer and the decal transfer methods allow for enhanced optical density of the color liquid crystal display.
    Type: Grant
    Filed: August 11, 1989
    Date of Patent: October 22, 1991
    Assignee: International Business Machines Corporation
    Inventors: Jack A. Dickerson, Neil M. Poley
  • Patent number: 4998885
    Abstract: This invention provides an interposer for electrically connecting two substrates with high density interconnections. The interposer comprises an elastomeric material surrounding fine metal wires which extend through the elastomeric material. The elastomeric material provides mechanical support and electrical isolation for the wires which connect the two opposing surfaces of the interposer with mating substrates. One surface of the interposed has scribes cut into it which mechanically isolate the individual wires. This mechanical isolation between wires reduces the stress placed on the substrates from being connected when the interposer is compressed between the substrates. The support given individual wires by the elastomeric material is controlled, by adjusting the spacing and widths of the scribes, to provide uniform compression across the substrates.
    Type: Grant
    Filed: October 27, 1989
    Date of Patent: March 12, 1991
    Assignee: International Business Machines Corporation
    Inventor: Brian S. Beaman
  • Patent number: 4984146
    Abstract: This invention provides a means for suppressing radiated electromagnetic radiation in high current AC/DC power supplies. This radiation is the result of rectifier diode transient noise which is propagated through the electrical network of the power supply. The transient noise is propagated through the electrical and mechanical connections of the diodes to the transformer secondary. These connections have stray impedance which allows high frequency noise to be propagated through them. The stray impedances can be modulated to suppress the high frequency noise propagation without adding discrete inductor or capacitor elements to the electrical network. The modulation of the stray impedances is accomplished by adjusting the current sharing between rectifier diodes. This is accomplished by splitting the parallel connection between rectifier diodes, and making the connection of the diodes to the transformer secondary at various points along the secondary.
    Type: Grant
    Filed: March 27, 1990
    Date of Patent: January 8, 1991
    Assignee: International Business Machines Corporation
    Inventors: Arthur G. Black, John R. Mazzuca, Carl J. Palmucci, Surya K. Rao
  • Patent number: 4980820
    Abstract: An interrupt driven digital processing system is disclosed including routines for servicing interrupt requests received from a plurality of interrupt sources. The interrupt servicing routines each interrupt regular processing within the system and perform predetermined work items required to immediately satisfy the received interrupt request. The active servicing routine then identifies and queues individual work items that must be performed to completely satisfy the received interrupt request, but that can be performed at a future time without affecting system performance. Regular processing is then reinstated and the queued work items are executed. By this means, regular processing is interrupted for a minimum amount of time while servicing individual interrupt requests. Also, the work items in queue are prioritized for execution during regular processing in order to optimize the performance of the digital processing system.
    Type: Grant
    Filed: November 9, 1989
    Date of Patent: December 25, 1990
    Assignee: International Business Machines Corporation
    Inventor: Loyal D. Youngblood
  • Patent number: 4967690
    Abstract: Nodule formation in a continuous electroless copper plating system is minimized by independently controlling the dissolved oxygen contents on the plating solution in the bath and in the associated external piping. The level of dissolved oxygen in the plating tank is maintained at a value such that satisfactory plating takes place. At the point where the plating solution leaves the tank, additional oxygen gas is introducted into the solution so that the level of dissolved oxygen in the plating solution in the external piping is high enough to prevent any plating from taking place in the external piping and so that in the external piping the copper is etched or dissolved back into solution. At the end of the external piping, the dissolved oxygen level is reduced so that the dissolved oxygen level of the plating solution in the tank is maintained at the level where plating will take place.
    Type: Grant
    Filed: April 12, 1990
    Date of Patent: November 6, 1990
    Assignee: International Business Machines Corporation
    Inventors: Edmond O. Fey, Peter Haselbauer, Dae Y. Jung, Ronald A. Kaschak, Hans-Dieter Kilthau, Roy H. Magnuson, Robert J. Wagner
  • Patent number: 4945857
    Abstract: The synthesis of hydride compounds by reacting both the ingredients of the compound and the hydrogen together in the presence of energy sufficient to ionize the hydrogen. An inert bombardment ingredient enhances efficiency. In situ generation of ingredients such as arsine is provided within the reactor adjacent the deposition site in chemical vapor deposition.
    Type: Grant
    Filed: March 15, 1989
    Date of Patent: August 7, 1990
    Assignee: International Business Machines Corporation
    Inventor: John C. Marinace
  • Patent number: 4927477
    Abstract: A method for making flush circuit laminates for use in constructing a multilayer circuit board is disclosed. The method comprises laminating together a dielectric sheet(s) of material, such as glass cloth impregnated with epoxy resin, placed between predrilled or pre-punched sheets of a conductive material, such as copper, to form the desired flush circuit laminate, such as a flush surface power core, which, in turn, may be used with other laminates to construct the desired multilayer circuit board. This method allows thinner laminates to be made with acceptable dimensional tolerances which provides improved impedance characteristics compared to laminates made using conventional processes. Thus, the method provide a method of making a more compact, higher speed multilayer circuit board without sacrificing circuit density on the circuit board. If desired, the method may be carried out using all dry processes.
    Type: Grant
    Filed: April 15, 1988
    Date of Patent: May 22, 1990
    Assignee: International Business Machines Corporation
    Inventor: Theron L. Ellis
  • Patent number: 4919729
    Abstract: A solder paste for use in a reducing atmosphere is disclosed. The solder paste includes a solder powder and an alcohol binder. The reducing atmosphere serves as a flux, thereby eliminating flux residues and the problems associated therewith. Solder splattering is reduced by using a polyhydric alcoholic binder which vaporizes or decomposes before the solder liquifies during heating. The use of such a solder paste in a reducing atmosphere results in no hazardous chemical by-products and, because the solder is handled in the form of a paste, is compatible with electrical components requiring precise dimensional tolerances.
    Type: Grant
    Filed: May 2, 1989
    Date of Patent: April 24, 1990
    Assignee: International Business Machines Corporation
    Inventors: Peter J. Elmgren, Alan J. Emerick, Dennis L. Rivenburg, Sr., Mukund K. Saraiya, David W. Sissenstein, Jr.
  • Patent number: 4918574
    Abstract: A multilayer circuit board having a conformal layer of an insulating material separating a circuit core from an adjacent insulating layer is disclosed. The conformal layer encapsulates the substrate and conductive pattern of circuit lines in the circuit core, thereby reducing failures caused by impurities trapped during lamination. The multilayer circuit board is manufactured by coating at least one circuit core with the conformal layer of insulating material before final lamination of the circuit cores into a multilayer circuit board.
    Type: Grant
    Filed: April 15, 1988
    Date of Patent: April 17, 1990
    Assignee: International Business Machines Corporation
    Inventors: Joseph G. Hoffarth, Donald J. Lazzarini, John A. Welsh, John P. Wiley
  • Patent number: 4901233
    Abstract: A register management system has more physical registers for general purpose use than are named in the architectural system. A renaming system identifies particular physical registers to perform as architected addressable or general purpose registers. An array control list (ACL) is provided to monitor the assignment and status of the physical registers. A decode register assignment list (DRAL) is provided to monitor the status of all of the architected registers and the correspondence to physical registers. A back-up register assignment list (BRAL) is used to preserve old status information while out of sequence and conditional branch instructions are executed. The physical registers may retain mutliple copies of individual addressable registers representing the contents at different stages of execution. The addressable register status may be restored if instruction execution is out of sequence or on a conditional branch causing a problem requiring restoration.
    Type: Grant
    Filed: July 20, 1987
    Date of Patent: February 13, 1990
    Assignee: International Business Machines Corporation
    Inventor: John S. Liptay
  • Patent number: 4888632
    Abstract: An improved structure and method for fabricating amorphous silicon thin film devices, particularly transistors, is described. In additiion to their usual role as gate insulator and optional capping layer, the insulator films are chosen to maximize the transmission of photolithographic active light through the structure. These layers are positioned to either side of the amorphous silicon layer which is a light absorbing layer to act as anti-reflective elements. The insulator layers are chosen to have a refractive index different than the substrate and a thickness dimension chosen so the wave components of said lithographically active light reflected at the interfaces of the completed structure interfere destructively.
    Type: Grant
    Filed: January 4, 1988
    Date of Patent: December 19, 1989
    Assignee: International Business Machines Corporation
    Inventor: Ivan Haller
  • Patent number: 4882245
    Abstract: A photocurable composition which is useful as a permanent resist in the manufacture of printed circuit boards and packages of such boards comprises a multifunctional epoxidized resin, a reactive diluent, a cationic photoinitiator and, optionally, an exposure indicator, a coating aid and a photosensitizer.
    Type: Grant
    Filed: June 12, 1987
    Date of Patent: November 21, 1989
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey D. Gelorme, Robert J. Cox, Sergio A. R. Gutierrez
  • Patent number: 4860067
    Abstract: A low band gap semiconductor heterostructure having a surface adaptable to planar processing and all semiconductor properties supported by a fabrication constraint relaxing substrate that does not provide a low impedance parallel current path. A superconductor normal superconductor device of n-InAs-100 nanometers thick with niobium superconductor electrodes spaced 250 nanometers apart and a 100 nanometer gate in the space. The N-InAs is supported by an undoped GaAs layer on a semi-insulating GaAs substrate. A heterojunction field effect transistor device having a GaAlAs gate over a channel 100 nanometers thick on an undoped GaAs layer on a semi-insulating GaAs substrate.
    Type: Grant
    Filed: December 23, 1987
    Date of Patent: August 22, 1989
    Assignee: International Business Machines Corporation
    Inventors: Thomas N. Jackson, Alan W. Kleinsasser, Jerry M. Woodall
  • Patent number: 4857383
    Abstract: A method of improving the adhesion between a synthetic substrate and metallized layers deposited thereon. A glass resin layer is spin-coated onto an epoxide substrate. The glass layer is covered by a photoresist layer which is roughened by reactive ion etching. The roughened contour of the photoresist layer is transferred via reactive ion etching to form a perforation pattern in the glass layer. The substrate is then etched vertically and horizontally to produce recesses in the substrate having overhanging walls. A thin copper layer is sputtered onto the substrate and copper conductors are sputtered onto the thin copper layer, the copper layers filling the recesses. The recesses and overhangs form mortices in the substrate, and the copper layers within the recess form tenons which fittingly engage with the mortices to produce adhesion between the substrate and the metallized layers in the order of 1000 n/m.
    Type: Grant
    Filed: November 9, 1987
    Date of Patent: August 15, 1989
    Assignee: International Business Machines Corporation
    Inventors: Johann Greschner, Friedrich W. Schwerdt, Hans J. Trumpp
  • Patent number: 4786890
    Abstract: A rate 8/9, constrained partial response class IV code having run length limitation parameters (0,3/5) is provided for any partial response (PR) signaling system employing maximum likelihood (ML) detection.
    Type: Grant
    Filed: July 28, 1987
    Date of Patent: November 22, 1988
    Assignee: International Business Machines Corporation
    Inventors: Brian H. Marcus, Arvind M. Patel, Paul H. Siegel
  • Patent number: 4751101
    Abstract: A method is described for depositing thick, low-stress refractory metal films on a substrate. For example, a layer of tungsten of any required thickness may be deposited by the silicon reduction of tungsten hexafluoride in a CVD reactor. This is accomplished by alternating the process step of plasma depositing an amorphous silicon film, with the process step of exposing the silicon film to tungsten hexafluoride until the required thickness of tungsten is reached. The thickness of the deposited amorphous silicon film must be less than the thickness at which the replacement of silicon to tungsten becomes self-limiting to assure that all of the amorphous silicon is replaced. The bombardment of the silicon during plasma deposition "hammers" the underlying tungsten film and relieves the stress in the film.
    Type: Grant
    Filed: April 30, 1987
    Date of Patent: June 14, 1988
    Assignee: International Business Machines Corporation
    Inventor: Rajiv V. Joshi
  • Patent number: D303958
    Type: Grant
    Filed: September 25, 1986
    Date of Patent: October 10, 1989
    Assignee: International Business Machines Corporation
    Inventors: William V. Cranston, III, Randall W. Martin, Mark A. Young