Patents Represented by Attorney McGinn IP Law Group, LLC
  • Patent number: 8253502
    Abstract: A spread spectrum clock generator includes a voltage-controlled oscillator generating an operation clock, a feedback control unit, a modulated pulse generation unit generating a pulse signal obtained by performing a delta-sigma modulation on a component fluctuating a frequency of the operation clock, a level set unit setting an amplitude of the pulse signal, an adder adding a voltage generated by the feedback control unit and the pulse signal whose amplitude is set by the level set unit, and a low pass filter filtering a signal outputted from the adder and generating a control voltage applied to the voltage-controlled oscillator. The feedback control unit compares a phase of the operation clock with a phase of a reference clock, and based on results of the comparison, generates a voltage used as a reference to oscillate the voltage-controlled oscillator.
    Type: Grant
    Filed: May 27, 2010
    Date of Patent: August 28, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Yoshinori Kanda
  • Patent number: 8248866
    Abstract: A semiconductor storage device, in which successive reading and successive writing of data having a predetermined length from and to a memory cell specified by a certain address are performed, includes a plurality of memory cells, address input terminals through which the address is input, data output terminals through which read data having the predetermined length is output, and data input terminals through which write data having the predetermine length is input. Part of the address input terminals are also used as the data output terminals. In this way, the operation of successive reading and successive writing performed in succession at the same address can be made faster without increasing the number of terminals.
    Type: Grant
    Filed: June 8, 2010
    Date of Patent: August 21, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Tatsuya Ishizaki
  • Patent number: 8162166
    Abstract: A hole plug comprising: a main body part including a cover flange portion for covering an opening, an insertion portion extended from a central portion of a back surface of the cover flange portion to be inserted into the opening, and an engaging portion formed on an outer periphery of the insertion portion to be engaged with a back side peripheral edge of the opening; a thermo-softening resin member mounted on a peripheral edge of the cover flange portion and allowed to flow into a clearance between the cover flange portion and an opening peripheral edge of the plate-shaped member, thereby fixing them together; and an elastic flange portion extended in a skirt-like manner from the back surface of the cover flange portion toward the peripheral edge of the opening and elastically contactable with the peripheral edge of the opening of the plate-shaped member.
    Type: Grant
    Filed: November 21, 2007
    Date of Patent: April 24, 2012
    Assignee: Piolax Inc.
    Inventor: Hiroshi Nakazato
  • Patent number: 8102217
    Abstract: An oscillator creates a reference voltage based on a pulse signal corresponding to an oscillation output of a crystal oscillation circuit and controls a supply voltage to the crystal oscillation circuit according to the reference voltage. A control signal creating circuit creates a control signal based on the pulse signal and reference voltage generating circuits that control the reference voltage based on the control signal. The control signal creating circuit creates a low-level control signal when the pulse signal is in a low level, creates a high-level control signal when the pulse signal is in a high level, and prevents transition of the control signal from the high level to the low level.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: January 24, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Hiroyuki Aoki
  • Patent number: 8102046
    Abstract: Through heat discharge only by wiring connected to a conventional semiconductor chip, sufficient heat discharge performance may not be achieved in a recent semiconductor device. A semiconductor device according to an aspect of the present invention includes: a flexible substrate including a first main surface and a second main surface; a semiconductor chip; a first heat conductive layer formed on the first main surface of the flexible substrate and electrically connected to the semiconductor chip; and a second heat conductive layer formed on the second main surface of the flexible substrate and electrically insulated from the semiconductor chip.
    Type: Grant
    Filed: October 14, 2008
    Date of Patent: January 24, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Yasuaki Iwata, Chihiro Sasaki
  • Patent number: 7696061
    Abstract: A semiconductor device comprises a drift region of a first conduction type, a base region of a second conduction type, a source region of the first conduction type, a contact hole, a column region of the second conduction type, a plug and wiring. The drift region formed on a semiconductor substrate of the first conduction type. The base region of a second is formed in a prescribed region of the surface of the drift region. The source region is formed in a prescribed region of the surface of the base region. The contact hole extends from the source region surface side to the base region. The column region is formed in the drift region below the contact hole. The plug comprises a first conductive material and fills the contact hole. The wiring comprises a second conductive material and is electrically connected to the plug.
    Type: Grant
    Filed: September 26, 2007
    Date of Patent: April 13, 2010
    Assignee: NEC Electronics Corporation
    Inventor: Hitoshi Ninomiya
  • Patent number: 7339771
    Abstract: An electrostatic protection circuit to prevent damage to a protected circuit due to electrostatic discharge applied to an input/output terminal, comprises one or more diodes connected in series and provided between a connection point of the input/output terminal and the protected circuit, and a GND terminal and a MOS transistor connected to the diodes in series, and having an operating voltage lower than a signal voltage input from the input/output terminal. The diodes cause a voltage drop in normal operation.
    Type: Grant
    Filed: April 19, 2005
    Date of Patent: March 4, 2008
    Assignee: NEC Electronics Corporation
    Inventor: Yasuyuki Morishita