Patents Represented by Attorney McGinn IP Law Groups PLLC
  • Patent number: 8311080
    Abstract: Disclosed is a mobile communication terminal employing a code division multiple access scheme, in which when it is decided that the common channel level is equal to or higher than a third threshold (common channel level threshold), an RLF decision control unit compares the SIR data with a first threshold and a second threshold to decide in sync state/out-of sync state between the local spread code and the reception spread code and outputs the decision signal. When it is decided that the common channel level is lower than the third threshold, the first threshold and the second threshold are set to the same value. In this state, when it is decided that the level of the SIR data is lower than the first threshold (=second threshold), the decision signal corresponding to an out-of sync state is output immediately after a predetermined delay time elapses, thereby reducing the power dissipation.
    Type: Grant
    Filed: March 27, 2007
    Date of Patent: November 13, 2012
    Assignee: NEC Corporation
    Inventor: Kazunori Sato
  • Patent number: 8310589
    Abstract: Disclosed is a digital still camera in which amount of exposure is decided appropriately even when there is a changeover from one shooting scene to another. When a shooting mode is set, a first shooting scene discrimination is performed before a shutter-release button is half-pushed. A first amount of exposure is calculated using a program diagram suited to the shooting scene that has been discriminated by the first shooting scene discrimination. Shooting for focusing control is performed at an exposure corresponding to the first amount of exposure, whereby image data is obtained. Focusing control is carried out based upon the image data obtained, and shooting is performed again. Second shooting scene discrimination is performed based upon the image data obtained by shooting. A second amount of exposure is calculated using a program diagram suited to the shooting scene that has been discriminated by the second shooting scene discrimination.
    Type: Grant
    Filed: July 23, 2009
    Date of Patent: November 13, 2012
    Assignee: Fujifilm Corporation
    Inventor: Satoshi Okamoto
  • Patent number: 8308510
    Abstract: A wire harness includes a cable, a connector including an outer housing including a resin, a cable insertion hole into which an end portion of the cable is inserted, and a concave portion formed on an insertion side of the cable insertion hole, and a welding member including a resin to provide air-tightness between the outer housing and the cable by being welded to the outer housing by ultrasonic welding. The welding member is formed around the cable so as to surround the cable while allowing a gap portion to have a predetermined clearance from the cable, and fitted into the concave portion of the outer housing. Melted resin of the welding member is to flow into the gap portion to form an airtight seal about the cable.
    Type: Grant
    Filed: September 27, 2010
    Date of Patent: November 13, 2012
    Assignee: Hitachi Cable, Ltd.
    Inventors: Sachio Suzuki, Hideaki Takehara, Kunihiro Fukuda, Yuta Kataoka
  • Patent number: 8310431
    Abstract: A format of an inputted video signal is estimated to be based on the total number of vertical lines, and a frequency dividing ratio of a PLL unit is provisionally set at a predetermined value corresponding to the estimated format. Next, the frequency dividing ratio is calculated so that a measured value of a horizontal display width that is measured by a video detecting unit matches a capture width which is the horizontal display width capturable by a frame memory, and the calculated frequency dividing ratio is converted to a multiple of 4. A phase adjustment of the regenerative dot clock is performed against the video signal based on the converted frequency dividing ratio by using the regenerative dot clock generated by the PLL unit.
    Type: Grant
    Filed: February 8, 2008
    Date of Patent: November 13, 2012
    Assignee: NEC Display Solutions, Ltd.
    Inventor: Tatsuo Kimura
  • Patent number: 8310068
    Abstract: A TCP type semiconductor device, which is connected to a plurality of substrate-side electrodes parallel to each other and each having a linear shape, has: a base film; a semiconductor chip mounted on the base film; and a plurality of leads formed on the base film and electrically connecting between the semiconductor chip and the plurality of substrate-side electrodes, respectively. Each of the plurality of leads has an external terminal section extending in a first direction and configured to come in contact with corresponding one of the plurality of substrate-side electrodes. A part of the external terminal section is a wide section that is formed wider than the other section of the external terminal section A position of the wide section in the first direction is different between adjacent leads of the plurality of leads.
    Type: Grant
    Filed: July 7, 2010
    Date of Patent: November 13, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Suguru Sasaki
  • Patent number: 8310998
    Abstract: Efficient encoding techniques are described for encoding resource allocation data to be signalled to a number of user devices in a communication system. In one encoding technique, a resource allocation bit pattern is transmitted to all the users together with a resource ID for each user. Each user then identifies its allocated sub-carriers using the received allocation bit pattern and the received resource ID. In another encoding technique, a code tree is used to generate a value representing the sub-carrier allocation. The user device then uses the code tree to determine the sub-carrier allocation from the signalled value.
    Type: Grant
    Filed: March 20, 2007
    Date of Patent: November 13, 2012
    Assignee: NEC Corporation
    Inventors: Robert Arnott, Diptendu Mitra
  • Patent number: 8311273
    Abstract: An object detecting apparatus and method includes a pixel state determining unit that derives variance value for temporal properties of pixel characteristics of an input image, background model generating unit that adaptively generates a background model from characteristics in the characteristic storing unit and characteristic storing unit for background model generation using the characteristic distance and the pixel state determined as conditions, and an object judging unit that judges an object based on a characteristic distance indicative of a degree of similarity between a generated background model and pixel characteristics of an input image.
    Type: Grant
    Filed: June 4, 2007
    Date of Patent: November 13, 2012
    Assignee: NEC Corporation
    Inventor: Hiroo Ikeda
  • Patent number: 8309969
    Abstract: A light emitting device includes a light-emitting portion including a metal part including a metal able to be bonded to a solder material, and a heat dissipation member that includes aluminum, aluminum alloy, magnesium or magnesium alloy and a bonding portion processed to be bonded to the solder material. The metal part of the light-emitting portion is bonded via the solder material to the bonding portion of the heat dissipation member. The solder material includes a material unable to be directly bonded to the heat dissipation member, the metal part of the light-emitting portion is formed by metalizing an insulation of ceramic or semiconductor, and the bonding portion includes a thermal expansion coefficient between that of the heat dissipation member and that of the insulation.
    Type: Grant
    Filed: November 20, 2009
    Date of Patent: November 13, 2012
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Yoshinobu Suehiro, Koji Tasumi
  • Patent number: 8310125
    Abstract: In a motor comprising a stator and a rotor disposed in an inner circumference of the stator, the stator comprises a substantially cylindrical stator core and coils made up of wound conductors, and the stator core comprises an outer circumferential portion which constitutes an outer circumferential wall of the stator and an inner circumferential portion round which the conductors are wound. The outer circumferential portion is formed of a first sintered metal made of a powder magnetic material, while the inner circumferential portion is formed of a second sintered metal made of a powder magnetic material, and the first sintered metal is a sintered metal having a higher mechanical strength than the second sintered metal. Additionally, the stator core is formed by diffusion bonding the outer circumferential portion and the inner circumferential portion being bonded together.
    Type: Grant
    Filed: February 22, 2008
    Date of Patent: November 13, 2012
    Assignee: JTEKT Corporation
    Inventor: Yasuhiro Yukitake
  • Patent number: 8308373
    Abstract: An outer tapered member (4) having a conical inner circumferential surface is placed and an inner tapered member (5) having a conical outer circumferential surface in contact with the conical inner circumferential surface is placed in a through hole (31) of a first ring (1). A screw member (6) is screwed a predetermined quantity into the through hole (31) to axially press an axial end face of the inner tapered member (5) toward a second ring (2) with a predetermined force and to press the outer surface of the outer tapered member (4) against the through hole (31) of the first ring (1) with a predetermined force. A weld part (7) in contact with a first ring (1) side end portion of a pin (3) and the first ring (1) is formed to prevent the pin (3) from coming out of the first ring (1) by the weld part (7).
    Type: Grant
    Filed: March 10, 2009
    Date of Patent: November 13, 2012
    Assignee: JTEKT Corporation
    Inventors: Takeshi Miyachi, Junichi Kubo
  • Patent number: 8310425
    Abstract: A resistance dividing circuit includes a resistive element formed in an area in a first line segment and a second line segment which are set on a substrate and arranged in parallel to each other; and a tap portion connected to the resistive element at a predetermined position of the first line side. A cutout in which the resistive element does not exist is formed in a place corresponding to the predetermined position in a lengthwise direction of the resistive element. In such a structure, a deviation of an actually generated divided voltage from a design value thereof can be reduced so that a highly correct gray-scale display can be achieved.
    Type: Grant
    Filed: November 13, 2007
    Date of Patent: November 13, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Shigeki Okutani, Masaharu Takahashi
  • Patent number: 8310029
    Abstract: A group III nitride semiconductor free-standing substrate includes an as-grown surface, more than half of a region of the as-grown surface including a single crystal plane. The single crystal plane includes an off-angle inclined in an m-axis or a-axis direction from a C-plane with a group III polarity, or in a c-axis or a-axis direction from an M-plane.
    Type: Grant
    Filed: May 27, 2010
    Date of Patent: November 13, 2012
    Assignee: Hitachi Cable, Ltd.
    Inventors: Hajime Fujikura, Takeshi Eri
  • Patent number: 8309859
    Abstract: A substrate includes a base material, a first solder part disposed on a surface of the base material and used for connection to an electronic component, and a second solder part disposed on the surface of the base material and made of the same solder as that of the first solder part. The top surface of the first solder part is made to be a flat surface, and the maximum height of the second solder part from the surface of the base material is lower than the height of the flat surface of the first solder part from the surface of the base material. Thus, a substrate for which the kind of solder can be determined easily and with certainty, a device provided with this substrate, a method of manufacturing the substrate, and a determining method are provided.
    Type: Grant
    Filed: August 5, 2009
    Date of Patent: November 13, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Chiho Ogihara
  • Patent number: 8310863
    Abstract: A method of fabricating a magnetic memory element includes forming a plurality of magnetic layers having a perpendicular magnetic anisotropy component, in which the plurality of magnetic layers includes a first magnetic layer having an alloy of a rare-earth metal and a transition metal, and a second magnetic layer.
    Type: Grant
    Filed: February 4, 2011
    Date of Patent: November 13, 2012
    Assignee: International Business Machines Corporation
    Inventors: Jonathan Zanhong Sun, Stuart Stephen Papworth Parkin
  • Patent number: 8310890
    Abstract: A device and a method controlling the device are provided. A first command is supplied to the device in synchronization with a clock signal of a first frequency. The first command is to have the device perform a first operation. The frequency of the clock signal is changed from the first frequency to a second frequency higher than the first frequency. The device performs the first operation in synchronization with the clock signal of the second frequency following changing the frequency of the clock signal.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: November 13, 2012
    Assignee: Elpida Memory, Inc.
    Inventor: Akiyoshi Yamamoto
  • Patent number: 8310599
    Abstract: A television set includes a television set body section which has a display panel in which pixels are arranged at intersections of scan lines and data lines in a matrix; and first and second input terminals provided for the television set body section. A first video signal is displayed on the display panel in a first drive system when the first video signal supplied to the first input terminal is selected. A second video signal is displayed on the display panel in a second drive system when the second video signal supplied to the second input terminal is selected.
    Type: Grant
    Filed: August 5, 2008
    Date of Patent: November 13, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Yoshiharu Hashimoto
  • Patent number: 8310005
    Abstract: A semiconductor device includes a semiconductor layer, a first diffused region formed in the semiconductor layer, a second diffused region formed in the first diffused region, a trench formed in the semiconductor layer, a gate electrode disposed in the trench, a top surface of the gate electrode being lower than a top surface of the semiconductor layer and sagging downwards in a center thereof, a non-doped silicate glass film disposed in the trench and formed over the gate electrode, a top surface of the silicate glass film sagging downwards in a center thereof, an oxide film disposed in the trench and formed over the non-doped silicate glass film, a top surface of the oxide film sagging downwards in a center, and a source electrode formed over the semiconductor layer so that the source electrode contacts the first and second diffusion regions, and the oxide film at the top surface thereof.
    Type: Grant
    Filed: October 28, 2011
    Date of Patent: November 13, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Yoshimitsu Murase, Kenya Kobayashi, Hideo Yamamoto, Atsushi Kaneko
  • Patent number: 8310479
    Abstract: A display panel drive apparatus includes a source driver that drives each unit dot in accordance with a time-divisional clock, and a booster circuit that generates a supply voltage to be supplied to the source driver based on a clock having a rising edge and a falling edge each coinciding with an off-period of the time-divisional clock. The display panel drive apparatus performs a time-divisional driving operation during one horizontal period.
    Type: Grant
    Filed: September 15, 2009
    Date of Patent: November 13, 2012
    Assignee: RENESAS Electronics Corporation
    Inventor: Hirokazu Kawagoshi
  • Patent number: 8310382
    Abstract: In a stacked semiconductor device in which a plurality of through silicon vias used for data transfer are shared among a plurality of semiconductor chips, a first semiconductor chip included in the semiconductor chips holds through silicon via switching information for specifying a through silicon via among the through silicon vias to be used for data transfer, and transfers the through silicon via switching information to a second semiconductor chip included in the semiconductor chips. According to the present invention, because the through silicon via switching information is transferred from the first semiconductor chip to the second semiconductor chip, a circuit for storing the through silicon via switching information in a nonvolatile manner is not required in the second semiconductor chip. With this arrangement, a chip area of the second semiconductor chip can be reduced.
    Type: Grant
    Filed: October 8, 2010
    Date of Patent: November 13, 2012
    Assignee: Elpida Memory, Inc.
    Inventors: Akira Ide, Ryuji Takishita
  • Patent number: 8308453
    Abstract: A pump chamber (15) is formed between a piezoelectric vibrator (7) and a valve main plate (10). The valve main plate (10) includes an inlet port (13) at its central portion, and an outlet port (14) in its peripheral portion, and the inlet port (13) is made in a smaller diameter than the outlet port (14). On the valve main plate (10) an inflow check valve (11) and an outflow check valve (12) are provided, so that when the inflow check valve (11) and the outflow check valve (12) open and close in response to the vibration of the piezoelectric vibrator (7), a fluid is introduced into and discharged from the pump chamber (15).
    Type: Grant
    Filed: January 15, 2008
    Date of Patent: November 13, 2012
    Assignee: NEC Corporation
    Inventors: Mitsuru Yamamoto, Kazuhito Murata, Sakae Kitajo