Abstract: Techniques are disclosed for determining if the decomposition of layout design data is feasible, and for optimizing the segmentation of polygons in decomposable layout design data. Layout design data is analyzed to identify the edges of polygons that should be imaged by separate lithographic masks. In addition, proposed cut paths are generated to cut the polygons in the layout design data into a plurality of polygon segments. Once the separated edges and cut paths have been selected, a conflict graph is constructed that reflects these relationships. Next, a dual of the conflict graph is constructed. This dual graph will have a corresponding separation dual graph edge for each separated polygon edge pair in the layout design data. The dual graph also will have a corresponding cut path dual graph edge for each proposed cut path generated for the layout design data. After the dual graph has been constructed, it is analyzed to determine which of the proposed cut paths should be kept and which should be discarded.

Abstract: A system and method is disclosed in an emulation environment that dynamically remaps user designs. In one embodiment, a request is received to load an integrated circuit design to be emulated in a desired partition within the emulator. The emulator automatically determines the availability of the partition requested. If the partition is not available, the design is dynamically remapped to a different partition that is available. In another embodiment, clocks associated with the integrated circuit design are also dynamically remapped. In yet another embodiment, the user can control the size of the partitions (e.g., the number of printed circuit boards in a partition).

Abstract: Techniques for performing optical proximity correction on a layout design or portion thereof are provided with various implementations of the invention. With various implementations of the invention, movement and simulation of selected edge fragments is disabled during the optical proximity correction process. The operations of the optical proximity correction process, such as for example simulation and displacement of edge segments, is then performed for the edge fragments that remain enabled. With further implementations of the invention, a simulation site is defined for ones of the edge fragments. The operations of the optical proximity correction process, such as for example simulation and displacement of edge segments, is performed for each simulation site. Additionally, during the optical proximity correction process, the simulations sites may be moved and or removed individually based on various conditions.

Abstract: A method and apparatus for generating a source illuminator profile and a mask design, subsequently optimizing the source illuminator profile and mask design based upon a set of target intensity profiles. In various implementations, the Lagrange method of optimization is employed to optimize the radiation source, wherein an optimum intensity for each pixel of the source is determined. Subsequently, a continuous tone mask is generated based upon the diffraction orders of the optimized source. With various implementations, the target intensity profile is generated by deriving a set of band limited target frequencies corresponding to the optical lithographic system. Subsequently, homotopy methods may be employed to optimize the source illuminator profile and the continuous tone mask based upon the set of band limited target frequencies.

Abstract: Disclosed herein are computer aided design (CAD) techniques to implement a unified data schema and graphical user interface (GUI) to link ECU/devices, in-vehicle communications, and vehicle harness information together with respect to architectural relation, performance relation, and cost relation, and to facilitate a designer's understanding and manipulation of this information. The domain-specific information from each domain is converted to objects in this unified data schema and stored in a unified database that is accessible to every domain, so that the impact of the current state in the device domain can be accessed and analyzed by a designer from any domain. This approach enables design data sharing and real-time collaboration between different electrical/electronic (E/E) design domains, thereby facilitating the realization of design data collaboration, design change management, and product lifetime management (PLM) and product data management (PDM) implementation.

Abstract: The present invention relates to a method for finding design weakness and potential field failure of a PCB assembly which includes components, comprising the steps of: (a) creating a model of the PCB assembly by which natural frequencies and mode shapes of the PCB assembly can be determined; (b) performing a natural frequencies simulation for determining natural frequencies and mode shapes of the PCB assembly; and (c) analyzing said determined natural frequencies and mode shapes and identifying local dominant oscillations of components, components identified as having a local dominant oscillation in at least one of said determined mode shapes are identified as components having a relatively high potential of field failure.

Abstract: An integrated verification and manufacturability tool provides more efficient verification of integrated device designs than verification using several different verification components. The integrated verification and manufacturability includes a hierarchical database to store shared design data accessed by multiple verification components (e.g., layout versus schematic, design rule check, optical process correction, phase shift mask assignment and OPC verification and machine language conversion). The hierarchical database includes representations of one or more additional, or intermediate layer structures that are created and used by the verification components for operations performed on the design being verified. Use of a single hierarchical database having shared data for access and use by multiple verification components streamlines the verification process, which provides an improved verification tool.