Abstract: An optical rotary joint includes a first collimator arrangement for coupling on first light-waveguides, and a second collimator arrangement for coupling on second light-waveguides, with the second collimator arrangement being supported to be rotatable relative to the first collimator arrangement about a rotation axis. The collimator arrangements include collimators with an actuator that is adjustable along two axes. A control unit controls the actuators so that mechanical tolerances are compensated, and optical transmission loss between the collimator arrangements is minimal.

Abstract: Systems and methods for efficient dynamic utilization of shared resources in a processor. A processor comprises a front end pipeline, an execution pipeline, and a commit pipeline, wherein each pipeline comprises a shared resource with entries configured to be allocated for use in each clock cycle by each of a plurality of threads supported by the processor. To avoid starvation of any active thread, the processor further comprises circuitry configured to ensure each active thread is able to allocate at least a predetermined quota of entries of each shared resource. Each pipe stage of a total pipeline for the processor may include at least one dynamically allocated shared resource configured not to starve any active thread. Dynamic allocation of shared resources between a plurality of threads may yield higher performance over static allocation. In addition, dynamic allocation may require relatively little overhead for activation/deactivation of threads.

Abstract: Described herein are methods of making drospirenone. Also described are intermediate compounds that may be used to synthesis drospirenone.

Abstract: The embodiments relate to derivatives of 9-alkyl-?-carboline, their production and pharmaceutical compositions containing these 9-alkyl-?-carboline derivatives. Further, the use of 9-alkyl-?-carboline derivatives and pharmaceutical compositions for the treatment and prevention of movement disorders, neurodegenerative diseases, Alzheimer's disease and Parkinson's disease is described. Additionally, these effects can be utilized for the cultivation of cells such as dopaminergic cells or stem cells which shall be engrafted for the treatment of Parkinson's disease.

Abstract: Soft handoff in an OFDMA system is disclosed. If the pilot signal strength for a base station exceeds the defined threshold, the base station is added to an active set list. Subcarriers in a plurality of orthogonal frequency division multiplexing (OFDM) symbols are divided and allocated into subchannels. The OFDM symbols are divided and multiplexed. A soft handoff zone with a first dimension of the subchannels and a second dimension of the divided and multiplexed OFDM symbols is defined. The soft handoff zone has subcarriers with a subchannel definition, for example, an identical permutation.

Abstract: A method and apparatus for improving channel estimation within an OFDM communication system. Channel estimation in OFDM is usually performed with the aid of pilot symbols. The pilot symbols are typically spaced in time and frequency. The set of frequencies and times at which pilot symbols are inserted is referred to as a pilot pattern. In some cases, the pilot pattern is a diagonal-shaped lattice, either regular or irregular. The method first interpolates in the direction of larger coherence (time or frequency). Using these measurements, the density of pilot symbols in the direction of faster change will be increased thereby improving channel estimation without increasing overhead. As such, the results of the first interpolating step can then be used to assist the interpolation in the dimension of smaller coherence (time or frequency).

Abstract: In an embodiment, a method to automatically select groups of signals to be multiplexed on pins of a programmable logic device in a programmable logic device implementation of at least a portion of an integrated circuit is contemplated. The set of signals that may be candidates for multiplexing may be received (e.g., the set may be output by programmable logic device design tool). Clock domain tracing may be performed, and signals that have matching clock domains may be identified as candidates for multiplexing. Signals from matching clock domains may be grouped (up to a maximum number of signals that may be multiplexed on one pin) and assigned to pins of the programmable logic devices.

Abstract: Session control for emergency services sessions (E-sessions) originating in a circuit-switched subsystem (CS) or a multimedia subsystem (MS) is provided by the visited MS and is anchored at a domain transfer function (DTF), which is a service provided by a visited MS that is currently serving the user. As such, all call signaling for the E-session is passed through the DTF. The DTF enables efficient and effective subsystem transfers of the E-session between the CS and MS, while maintaining the E-session between the user element and the PSAP. The DTF may also provide to the PSAP location information bearing on the location of the user element when the E-session is established as well as provide updated location information when transfers between the CS and MS occur.

Abstract: A number of scan flops clocked by a master clock may be used to constructing a scan chain to perform scan tests. During a scan test, data appearing at the regular data input of each scan flop may be written into a master latch of the scan flop during a time period when the scan control signal is in a state corresponding to a capture cycle. A slave latch in each scan flop may latch a value appearing at the regular data input of the scan flop according to a narrow pulse triggered by the rising edge of the master clock when the scan control signal is in the state corresponding to the capture cycle. The slave latch may latch the data provided by the master latch according to a wide pulse triggered by the rising edge of the master clock when the scan control signal is in a state corresponding to a shift cycle. This may permit toggling the scan control signal during either a high phase or a low phase of the master clock, and may also enable testing the pulse functionality of each scan flop.

Abstract: In an embodiment, a peripheral component configured to control an external interface of an integrated circuit. For example, the peripheral component may be a memory interface unit such as a flash memory interface unit. The internal interface to the peripheral component may be shared between data transfers to/from the external interface and control communications to the peripheral component. The peripheral component may include a command queue configured to store a set of commands to perform a transfer on the interface. A control circuit may be coupled to the command queue and may read the commands and communicate with an interface controller to cause a transfer on the interface responsive to the commands. In an embodiment, a macro memory may store command sequences to be performed in response to a macro command in the command queue. In an embodiment, an operand queue may store operand data for use by the commands.

Abstract: System and method controlling connectivity within a device. A device may be coupled to a host device. In response to the coupling, low power logic (e.g., an embedded device) of the device may be coupled to the host device. The low power logic may perform enumeration with the host device using only power provided by the host device. The low power logic may also charge a battery of the device using power provided by the host device. Device circuitry of the device may provide a signal for coupling to the host device. In response, the device circuitry may be coupled to the host device and may perform device enumeration with the host device.

Abstract: A repeater circuit is disclosed. The repeater circuit includes an input circuit coupled to receive a data input signal and a clock signal, and an output circuit configured to, when activated, drive an output signal on an output node. The input circuit is further configured to activate the output circuit in order to initiate a logical transition of the data output signal. A deactivation circuit is configured to deactivate the output circuit at a delay subsequent to activation. A latch is coupled to the output circuit and it is configured to change a latch output state responsive to activation of the output circuit. The latch is configured to hold a state of the output node subsequent to deactivation of the output circuit. The input circuit is configured to activate the output circuit dependent on the clock signal. The deactivation circuit is configured to deactivate the output circuit independent of the clock signal.

Abstract: To better realize the great potential of amateur digital photography, the present invention introduces an integrated system for the acquisition, organization, manipulation, and publication of digital images by amateur digital photography enthusiasts. The system of the present invention first acquires images from a number of different image sources. Images acquired in the same image importing session are marked as coming from the same conceptual film roll. Next, a user is empowered to organize and manipulate the acquired images. The images may be organized by tagging the images with informative keywords and grouping images together into conceptual photo albums. Furthermore, the images may be manipulated by rotating, cropping, and removing red-eye. Finally, the system of the present invention provides simple intuitive image publish systems.

Abstract: Systems and methods are provided for interfacing wireless communications between two devices such that a device devoid of a relatively long-range communications protocol can access that protocol. This may be accomplished by providing a host device having relatively short-range communications circuitry integrated therein, which circuitry may be operative to communicate with relatively short-range communications circuitry of a multi-protocol or long-range communications device that also includes relatively long-range communications circuitry.

Abstract: A system and method for wirelessly transmitting audiovisual information. A first plurality of packets including audiovisual information may be generated. A second plurality of packets including error correction coding information for the audiovisual information may be generated. Control information for associating the error correction coding information with the audiovisual information may be generated, and a third plurality of packets including the control information may also be generated. The plurality of packets, including the first, second, and third pluralities of packets, may be transmitted to a mobile device in a wireless manner. The control information may inform the mobile device of the association of the first error correction coding information with the audiovisual information.

Abstract: In one embodiment, a design methodology is described in which a functional description of each macro may be synthesized along with the other logic in a block. The resulting circuitry, including synthesized circuitry corresponding to each macro, may be placed within an area designated for the integrated circuit. The result may be analyzed, determining a location for the macro based on the location of the corresponding synthesized circuitry. For example, the geometric center of the synthesized circuitry may be located, and the geometric center of the custom circuitry associated with the macro may be placed at the same point as the geometric center of the synthesized circuitry. Because the macros are not placed in advance, the location of the macro may be controlled by other factors such as timing, space, wiring congestion, etc.

Abstract: A method and system adaptively reduce a peak-to-average power ratio in a communication system. Energy is clipped from at least one peak of a modulated signal. The modulated signal includes a plurality of sub-carriers. At least one data sub-carrier is adaptively selected for peak-to-average power ratio reduction use based on known scheduling information. The clipped energy is distributed among at least one data sub-carrier.

Abstract: In an embodiment, a timer unit may be provided that may be programmed to a selected time interval, or wakeup interval. A processor may execute a wait for event instruction, and enter a low power state for the thread that includes the instruction. The timer unit may signal a timer event at the expiration of the wakeup interval, and the processor may exit the low power state in response to the timer event. The thread may continue executing with the instruction following the wait for event instruction. In an embodiment, the processor/timer unit may be used to implement a power-managed lock acquisition mechanism, in which the processor is awakened a number of times to check the lock and execute the wait for event instruction if the lock is not free, after which the thread may block until the lock is free.

Abstract: A method for identifying and removing redundant signal paths includes determining whether a given input to a logic circuit is coupled to both an input of a cone of logic of a data input of a clocked state element and a clock gate circuit that is coupled to disable a clock input to the clocked state element. The method may include removing the given input from the cone of logic such that the given input is no longer coupled to the input of the cone of logic responsive to determining that the given input is coupled to both the input of the cone of logic and the clock gate circuit. The method may include preserving the given input to the clock gate circuit such that the given input continues to be coupled to the clock gate circuit after being removed from the input of the cone of logic.

Abstract: In an embodiment, a design methodology and tools to implement the methodology are used to perform scan insertion in an integrated circuit design. The physical location of the scan chains within the boundaries of the integrated circuit may be determined, and the methodology may use the physical information to perform the scan insertion. For example, the physical information may include the location of the inputs and outputs of the scan chains, as well as routability data indicating the ability to insert interconnect in the integrated circuit to make the desired scan connections. The location and routability information may be used to group scan chain inputs and outputs for, e.g., compression/decompression logic. Using physical data to insert scan compression/decompression logic may reduce the amount of area occupied by the scan logic and connectivity, in some embodiments.