Patents Represented by Attorney Meyertons, Hood, Kivlin & Goetzel, P.C.
  • Patent number: 8207965
    Abstract: A digital representation having a data structure with tessellated data defining an object in terms of triangles is compressed by analyzing the tessellated data to identify neighboring triangles, identifying stripes comprising series of neighboring triangles, redefining a given triangle with respect to a preceding triangle in the stripe in terms of a vertex of the given triangle that is not on a common edge with the preceding triangle. Digital values of the compressed digital representation for a triangle are fed back to the digital representation and are used for triangles processed subsequently. The third vertex can be defined in terms of a vector from a predetermined position with respect to the common edge.
    Type: Grant
    Filed: March 21, 2007
    Date of Patent: June 26, 2012
    Assignee: Adobe Systems Incorporated
    Inventor: Eric Vinchon
  • Patent number: 8055975
    Abstract: In one embodiment, an apparatus includes a check/correct circuit coupled to a control circuit. The check/correct circuit is coupled to receive a block of data and corresponding check bits. The block of data is received as N transmissions, each transmission including M data bits and L check bits. The check/correct circuit is configured to detect one or more errors in each of a plurality of non-overlapping windows of K bits in the M data bits, responsive to the M data bits and the L check bits. The control circuit is configured to record which of the plurality of windows have had errors detected and, if a given window of the plurality of windows has had errors detected in each of the N transmissions of the block, the control circuit is configured to signal a device failure. Each of K, L, M, and N are integers greater than one.
    Type: Grant
    Filed: June 5, 2007
    Date of Patent: November 8, 2011
    Assignee: Apple Inc.
    Inventors: Brian P. Lilly, Robert Gries, Sridhar P. Subramanian, Sukalpa Biswas, Hao Chen
  • Patent number: 7895063
    Abstract: Computer-implemented methods and systems for creating pre-configured claim reports including estimated liability for a vehicle accident are provided. In an embodiment, claim information on a computer system required by a pre-configured claim report for an accident may be accessed from a database. In some embodiments, the claim information may be accessed if a user-specified condition is met. In other embodiments, the claim information may be accessed periodically following a user-specified time period. A pre-configured claim report may be created from the accessed claim information. In certain embodiments, the pre-configured claim report may be sent to a user-specified location.
    Type: Grant
    Filed: November 27, 2002
    Date of Patent: February 22, 2011
    Assignee: Computer Sciences Corporation
    Inventors: Stefan Wahlbin, Kathleen E. Rourke, Kimberly Wiesman
  • Patent number: 7627722
    Abstract: A method for denying probes during proactive synchronization includes a first processor operating in an advanced synchronization mode, which includes the first processor specifying and acquiring exclusive access to a given memory resource. During operation in the advanced synchronization mode, specifying comprises executing a code sequence including: one or more locked memory reference instructions having a LOCK prefix and one or more addresses associated with the given memory resource. Specifying also includes executing an ACQUIRE instruction that is subsequent to the one or more locked memory reference instructions. The method further includes a second processor requesting access to the given memory resource and issuing a probe message. In response to receiving the probe message, the first processor responding to the probe message with a failure message, thereby denying the second processor access to the given memory resource.
    Type: Grant
    Filed: August 23, 2006
    Date of Patent: December 1, 2009
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Mitchell Alsup
  • Patent number: 6831653
    Abstract: A system and method for packing pixels together to provide a increased fill rate in a frame buffer hardware in the graphics system. The graphics system may be configured to receive and rasterize graphics data at a faster cycle rate than the system's frame buffer memory fill rate. The output from the rasterization hardware may be stored in a FIFO memory that is configured to selectively shift pixels in order to improve fill rate performance. The FIFO memory may be configured to ensure that the pixels meet certain criteria in order to prevent page faults and interleave conflicts that could reduce the fill rate. The FIFO memory may also be configured to remove empty cycles that occur as a result of the pixel packing.
    Type: Grant
    Filed: July 31, 2001
    Date of Patent: December 14, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: David Kehlet, Nandini Ramani, Yan Yan Tang, Roger W. Swanson
  • Patent number: D546128
    Type: Grant
    Filed: June 2, 2005
    Date of Patent: July 10, 2007
    Assignee: The Décor Corporation Pty. Ltd.
    Inventor: Arthur Richard Carlson