Patents Represented by Attorney Micahel J. Balconi-Lamica

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  • Method of making a dual strained channel semiconductor device
    Patent number: 7282402
    Abstract: According to the embodiments to the present disclosure, the process of making a dual strained channel semiconductor device includes integrating strained Si and compressed SiGe with trench isolation for achieving a simultaneous NMOS and PMOS performance enhancement. As described herein, the integration of NMOS and PMOS can be implemented in several ways to achieve NMOS and PMOS channels compatible with shallow trench isolation.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: October 16, 2007
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Mariam G. Sadaka, Alexander L. Barr, Dejan Jovanovic, Bich-Yen Nguyen, Voon-Yew Thean, Shawn G. Thomas, Ted R. White