Abstract: A battery cell bypass protection technology for use with NiH2 (or other energy storage) cells on a spacecraft or other high reliability application. The device is a thermally activated switch, designed to bypass the current around a failed (open) or failing cell so that the other cells in the battery are unaffected. One unique aspect of the design is a “pre-loaded” compression action, solder shorting mechanism. Another unique aspect is that the construction employs series redundant heaters and blocking diodes in multi-chip packages. These unique aspects provide consistent and complete shorting to provide a low-resistance cell bypass in any orientation on earth (1g) or in orbit (0g). Another unique aspect is the use of non-lead-based solder that minimizes “creep” over time and temperature.

Abstract: A hermetic packaging technology for silicon Schottky die or any other two terminal solderable die. The technology uses a pressed ceramic frame, solid metal pads, a solid metal disc, metal seal rings, and a direct high temperature solder bond to the die. There are no intermediate straps or wires used to connect the die to the metal pads. The die is actually part of the final package, or it can be said that the package is built around the die. The device is hermetically sealed for use in high reliability applications such as military or space programs. All materials used in the technology are matched for coefficient of thermal expansion (CTE).

Abstract: The present invention is directed to a semiconductor device and method wherein a vertical opening is provided or formed completely through a semiconductor substrate of the semiconductor device to print an external electrical contact to be made to one of the semiconductor regions of the semiconductor substrate. In the disclosed embodiment an electrical contact is also provided to the bottom portion of the semiconductor substrate.

Abstract: A surface mount package for use with large area silicon device. The package uses a pressed ceramic frame and solid metal pads which are closely matched for coefficient of thermal expansion (CTE) to each other and to the silicon die. The package is specifically designed for large area die (greater than 0.0625 inches squared) and for high temperature eutectic alloy bonding. All materials of the package are CTE matched to each other and to silicon within 10%.