Abstract: In an arrangement for testing an integrated circuit comprising at least two circuit sections (1, 2) which in normal operation operate with at least two different clock signals, a minimal number of test runs for testing the integrated circuit is required because the integrated circuit to be tested is formed in such a way that each clock signal can be individually switched on and off during a test by test software provided in the arrangement, a software model of the circuit to be tested is provided in the arrangement, which software model comprises an X generator (38, 40) for those circuit components (33, 35) whose mode of operation is influenced by a plurality of clock signals and their skew behavior, which X generator is activated and supplies an X signal when more than one clock signal influencing the mode of operation of the circuit components (33, 35) during testing is activated, while, during testing, the test software initially activates all clock signals and evaluates test results for those circuit comp
Type:
Grant
Filed:
August 7, 2001
Date of Patent:
September 7, 2004
Assignee:
Koninklijke Philips Electronics N.V.
Inventors:
Friedrich Hapke, Ruediger Solbach, Andreas Glowatz