Patents Represented by Attorney, Agent or Law Firm Mikin Tshimaru
  • Method for low stress plating of semiconductor vias and channels
    Patent number: 6368965
    Abstract: A method is provided for forming conductive layers in semiconductor device channels and vias by using forward current and periodic pulse reverses for filling inward from the sidewalls of the channels and vias. The pulse reversals and inward filling reduce recrystallization rate to improve electromigration resistance and reduce the stress in the conductive layers to eliminate voids.
    Type: Grant
    Filed: February 15, 2001
    Date of Patent: April 9, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Sergey D. Lopatin