Abstract: One inertial sensor detects an acceleration in a driving direction as well as an angular rate about one axis and an acceleration in a detecting direction at the same time. A driving-direction acceleration detecting unit is provided to members vibrating in mass members on the left and right via an elastic body. In this manner, when an acceleration is applied in the driving direction, the mass members on the left and right normally vibrated with a same amplitude and in opposite phases have displacement amounts in a same phase, and the driving-direction acceleration detecting unit detects the displacement amounts in the same phase as a capacitance change, thereby detecting the acceleration in the driving direction.

Abstract: An angular rate sensor and an acceleration sensor are sealed at the same sealing pressure. The sealing pressure at this time is put into a reduced pressure state below the atmospheric pressure in view of improving a detection sensitivity of the angular rate sensor. Even in the reduced pressure atmosphere, to improve the detection sensitivity of the acceleration sensor, a shift suppressing portion (damper) for suppressing shifts of a movable body of the acceleration sensor is provided. This shift suppressing portion includes a plurality of protruding portions integrally formed with the movable body and a plurality of protruding portions integrally formed with a peripheral portion, and the protruding portions are alternately disposed separately at equal intervals.

Abstract: There is provided a waveform equalization circuit with pulse width modulation that includes pulse-width adjust-level generation circuits PWCLC1a, PWCLC2a, for generating a pulse-width adjust-level VCNT on the basis of preceding input data units Din_P, Din_N, respectively, pulse-width adjustment circuits PWCC1a, PWCC2a, for adjusting a pulse-width according to VCNT, respectively, and a waveform shaping circuit WAC for shaping a waveform of an output signal from each of the pulse-width adjustment circuits. The pulse-width adjustment circuit has a driving power to be controlled according to a consecutive bits count of each of the preceding input data units, and varies transition time of each of output data units Do1_P, Do1_N, thereby adjusting the pulse width.

Abstract: A memory controller and data processor have their operation mode switched from the page-on mode for high-speed access to a same page to the page-off mode in response to consecutive events of access to different pages, so that the memory access is performed at a high speed and low power consumption.

Abstract: The invention relates to a production method of a lateral electro-optical modulator on an SOI substrate, the modulator comprising a rib waveguide formed in the thin layer of silicon of the SOI substrate, the rib waveguide being placed between a doped region P and a doped region N formed in the thin layer of silicon, the rib waveguide occupying an intrinsic region of the thin layer, at least one doped zone P being formed in the rib and perpendicularly to the substrate. The method comprises masking steps of the thin layer of silicon to define therein the rib of the waveguide, etching of the rib, masking of the thin layer of silicon to delimit the parts to be doped P, doping of the parts to be doped P, masking of the thin layer of silicon to delimit the region to be doped N and doping of the region to be doped N.

Abstract: In a method for manufacturing a semiconductor device involving the step of bonding a metallic ribbon to a pad of a semiconductor chip, breakage of the metallic ribbon is to be prevented while ensuring the bonding strength even when the metallic ribbon becomes thin with reduction in size of the semiconductor chip. In bonding an Al ribbon to a pad of a semiconductor chip by bringing a pressure bonding surface of a wedge tool into pressure contact with the Al ribbon while applying ultrasonic vibration to the ribbon positioned over the pad, recesses 10a are formed beforehand at both end portions respectively of the wedge tool lest both end portions in the width direction of the Al ribbon bonded to the pad should contact the pressure bonding surface of the wedge tool.

Abstract: A semiconductor device having a FIN type transistor including a FIN-shape semiconductor portion improved for reliability by suppressing scattering of the characteristics of the FIN-shape transistor by decreasing a difference between impurity concentration at an upper surface and impurity concentration on a lateral side of the FIN-shape semiconductor portion, in which a pad insulating film at a thickness of about 2 to 5 nm is formed to the upper surface of the FIN-shape semiconductor portion, cluster ions are implanted to one lateral side of the FIN-shape semiconductor portion from an oblique direction at a first implantation angle ?1 and then cluster ions are implanted to another lateral side of the FIN-shape semiconductor portion from an oblique direction at a second implantation angle ?2 in symmetrical with the first implantation angle ?1 and, subsequently, the cluster ions implanted to the FIN-shape semiconductor portion 10 are activated to form a diffusion region that forms a portion of a source region an

Abstract: The present invention is directed to perform fine low-voltage control without largely increasing the circuit layout area in a low-power consumption structure. In the case of shifting a region to a low-speed mode, a system controller outputs a request signal and an enable signal to a power switch controller and a low-power drive circuit, respectively, to turn off a power switch and to perform a control so that the voltage level of a virtual reference potential becomes about 0.2 V to about 0.3V. The region operates on voltages between a power supply voltage and a virtual reference potential, so that it is controlled in the low-speed mode.

Abstract: A semiconductor integrated circuit device capable of achieving improvement of I/O processing performance, reduction of power consumption, and reduction of cost is provided. Provided is a semiconductor integrated circuit device including, for example, a plurality of semiconductor chips stacked and mounted, the chips having data transceiving terminals bus-connected via through-vias, and data transmission and reception are performed via the bus with using the lowest source voltage among source voltages of internal core circuits of the chips. In accordance with that, a source voltage terminal of an n-th chip to be at the lowest source voltage is connected with source voltage terminals for data transceiving circuits of the other semiconductor chips via through-vias.

Abstract: The present invention enables improvement of bonding reliability of the conductive adhesive interposed between a semiconductor chip and a die pad portion. Provided is a semiconductor device, in which a silicon chip is mounted over the die pad portion integrally formed with a drain lead, has a source pad over the main surface and a drain electrode of a power MOSFET over the back side, and is bonded onto the die pad portion via an Ag paste. In the device, a source lead and the source pad are electrically coupled via an Al ribbon. Over the back surface of the silicon chip, an Ag nanoparticle coated film is formed, while another Ag nanoparticle coated film is formed over the die pad portion and lead (drain lead and source lead).

Abstract: Described are computer-based methods and apparatuses, including computer program products, for automation of auditing claims. Data indicative of an insurance company name is received, the data comprising one or more words. The data is processed through one or more processing steps to generate processed data comprising one or more processed words. One or more candidate word strings are selected based on the one or more processed words. Matching information is associated with each of the one or more candidate word strings. Analysis information is generated for each of the one or more candidate word strings based on the associated matching information. An insurance company identifier is associated with received data based on the analysis information and one or more matching rules.

Abstract: It is intended to reduce the number of exclusive signal interconnections for connecting a host module to a liquid crystal display driver for a sub-display, and peripheral devices, respectively. A liquid crystal display drive and control device comprises, over one semiconductor substrate, a host interface circuit, a drive circuit, and an output port. The host interface circuit is used for connection with the host module. The drive circuit generates a drive signal for driving a liquid crystal display on the basis of information inputted to the host interface circuit before outputting. The output port is capable of controlling a logic level of an output signal on the basis of the information inputted to the host interface circuit.

Abstract: To reduce pseudo errors, a stationary signal is propagated through the circuit to be checked. A combination is extracted in which different asynchronous transfers occur between a transmitting side register and a receiving side register. From the extracted combination of asynchronous transfers, a circuit to be checked is extracted, and a synchronization circuit of a plurality of signals is excluded from the circuit to be checked. A stationary signal is propagated through the circuit to be checked, for each combination among all combinations of logic values “1” and “0” of the stationary signal. It is checked whether or not there exists one asynchronous transmitting side register to which signal change can logically reach, in the combination of logic values of the stationary signal propagated. Based on the result, it is determined whether or not the circuit is appropriate as a synchronization circuit for a single-signal transfer, thereby reducing pseudo errors.

Abstract: An intervertebral disc and facet joints prosthesis includes (i) an intervertebral disc prosthesis element having an upper rigid prosthesis endplate, a lower rigid prosthesis endplate, and a core interposed between and attached to the rigid endplates, and (ii) at least one facet joint prosthesis element, each facet joint prosthesis element including an upper facet joint prosthesis component and a lower facet joint prosthesis component. The upper facet joint prosthesis component is constructed to cooperate with its respective lower facet joint prosthesis component, the upper facet joint prosthesis component being rigidly fixed to the upper endplate and the lower facet joint prosthesis component being rigidly fixed to the lower endplate. The prosthesis may be implanted by surgical procedures involving a posterior or postero-lateral approach.

Abstract: An object of the present invention is to provide means for eliminating a transmission delay when transmitting emergency information for the sake of relief, security, or the like in a wireless device in conformity with the wireless LAN standard in which if radio waves transmitted from peripheral devices are detected, transmission has to be stopped. In a multimode wireless communication scheme having two or more communication schemes, priorities of the communication schemes are set. A high priority or low priority regarding to a message is described in a “message type” data field of a frame of a controlling channel output from the access point side to the terminal side. When the frame of the controlling channel is decrypted on the terminal side, the message type is confirmed, so that the type of a service channel used thereafter is confirmed and the channel is coupled.

Abstract: A directional coupler with a high coupling per unit area and small variations in characteristic at manufacturing capable of achieving a high directivity easily and an RF circuit module provided with the directional coupler are achieved. A main-line is provided on a front surface of a multi-layer substrate, a ground plane is provided on a back surface of the multi-layer substrate. On an inner layer immediately under the main-line, two lines in parallel with the main-line are provided, and one line is provided on a layer closer to the ground plane than the two lines. By connecting the two lines and the one line with vias, a sub-line with a shape of a winding of a loop is formed. In the sub-line, a main component of a vector vertically penetrating the loop is horizontal with respect to the ground plane.

Abstract: In a memory array MCA which includes memory cells MC each having a variable-resistance-based memory device RQ and a select transistor MQ, an object is to receive a fixed quantity of storage data for a short time, and to realize writing operation to the memory cell, with suppressed peak current. In order to achieve the object, the data bus occupation time in rewriting operation is shortened by using plural sense amplifiers and storing storage data temporarily, and plural programming circuits are provided and activated using the control signals with different phases. By the above, the phase change memory system with low current consumption can be realized, without causing degradation of the utilization ratio of the data bus.

Abstract: Microelectronic image sensor array device comprising a plurality of elementary cells laid out according to an array and each provided with at least one photosensitive zone for capturing photon(s) and converting photon(s) into electron(s), at least one or several of said cells comprising electronic avalanche multiplier means, provided to produce, during cycles known as electron amplification cycles, a greater number of electrons than the number of electrons converted by the photosensitive zone, the device further comprising a control circuit adapted to modulate the amplification gain of each cell individually.

Abstract: A blast-resistant panel may include a layer of a pre-cured elastomeric material having a predetermined thickness, a body portion, and a plurality of flanges, each of the plurality of flanges having a substantially equal width and depending away from a same side and at approximately equivalent right angles to the body portion. The blast-resistant panel may also include a plurality of fastener elements for securing the cured elastomeric material layer to a surface of a structure through the plurality of flanges of cured elastomeric material.

Abstract: In a semiconductor integrated circuit wherein low-threshold-voltage and high-threshold-voltage transistors are disposed mixedly, the operating speed of each transistor can be properly controlled in speed control execution through regulation of a power supply voltage VDD. The semiconductor integrated circuit comprises an internal circuit and measuring circuits. The internal circuit comprises a low-threshold-voltage MOS transistor and a high-threshold-voltage MOS transistor, and the degree of threshold voltage variation of the low-threshold-voltage MOS transistor is larger than the degree of threshold voltage variation of the high-threshold-voltage MOS transistor. The measuring circuit detects which one of fast, typical, and slow states is taken by both the low-threshold-voltage MOS transistor and the high-threshold-voltage MOS transistor.