Patents Represented by Attorney Mitchell S. Bigel
  • Patent number: 5663950
    Abstract: An apparatus and method for fault isolation and bypass in a dual ring communication system provides a reconfiguration unit capable of attachment to a dual ring communication system having a plurality of reconfiguration units. The disclosed reconfiguration unit has a single adapter to the dual ring communication system and includes isolation and wrap switches capable of isolation and bypass of faults. A reconfiguration unit having a single adapter to the dual ring communication system detects failures on the ring and generates a failure frame which if not received from the ring causes the reconfiguration unit to enter a downstream wrap state. The reconfiguration unit enters an upstream wrap state if a failure frame is received from the nearest downstream reconfiguration unit.
    Type: Grant
    Filed: April 27, 1995
    Date of Patent: September 2, 1997
    Assignee: International Business Machines Corporation
    Inventors: Nai Po Lee, Jay Lee Smith
  • Patent number: 5651000
    Abstract: Methods and systems for determining the address of the nearest downstream reconfiguration unit in a dual ring communication system. In a dual ring communication system having a plurality of reconfiguration units one of the reconfiguration units determines if a Reconfiguration Unit Monitor is active on the system. If a Reconfiguration Unit Monitor is not active the reconfiguration unit requests and stores address information from the remaining reconfiguration units in the ring and assembles a ring sequence reconfiguration unit ring map. The reconfiguration unit transmits the reconfiguration unit ring map to the remaining reconfiguration units in the ring. Reconfiguration units receive the reconfiguration unit ring map from the Reconfiguration Unit Monitor and extracts the address of the nearest downstream reconfiguration unit from the reconfiguration unit ring map.
    Type: Grant
    Filed: April 27, 1995
    Date of Patent: July 22, 1997
    Assignee: International Business Machines Corporation
    Inventors: Nai Po Lee, Jay Lee Smith
  • Patent number: 5613783
    Abstract: A point of sale printer includes a magnetic reader for processing transactions and payment by check at a checkout point of a retail establishment. The printer includes a magnetic or MICR reader located at a predetermined point on the printer's document travel path and a print head located at the same point on the document travel path but laterally offset from the MICR reader to allow the printer to print customer receipts and a journal as well as reading MICR information from checks and endorsing the check after it is cleared. A pressure pad is used with the magnetic read head of the MICR reader which utilizes a pressure film which flexes when a document is inserted between the magnetic read head and the pressure film to provide a spring loading force on the magnetic read head while still allowing the document to be moved smoothly past the magnetic read head.
    Type: Grant
    Filed: March 27, 1995
    Date of Patent: March 25, 1997
    Assignee: International Business Machines Corporation
    Inventors: Michael J. Kinney, Robert W. Kruppa, Robert A. Myers
  • Patent number: 5216612
    Abstract: An intelligent computer integrated maintenance system and method includes an electronically stored parts manual which contains a hierarchical listing of all parts in production machines, and a maintenance operations computer controller which includes a maintenance schedule management subsystem, an engineering change control subsystem, a parts manual management subsystem and a spares inventory management subsystem. The maintenance schedule management subsystem obtains a schedule of actual and planned production, and groups maintenance activities in order to minimize lost production time. The engineering change control subsystem integrates engineering change activities with maintenance activities to maximize production time. The automated parts manual is also updated to account for engineering changes. The spare parts inventory management subsystem orders spare parts based on predicted maintenance rather than on prescribed inventory levels.
    Type: Grant
    Filed: July 16, 1990
    Date of Patent: June 1, 1993
    Assignee: R. J. Reynolds Tobacco Company
    Inventors: Rickey R. Cornett, R. Victor Walsh, Ronald S. Willard, Michael Z. Johnston, Jaime P. Saluta, Daniel J. Tylak, Michael J. Bird
  • Patent number: 4799061
    Abstract: A system for authenticating components in a communications system using cryptographic techniques to determine if each has the proper key without disclosing information which would be useful to an imposter in deriving the key. A random number generated at a first terminal is encrypted under its key for transmission as a first value to a second terminal whose identity is to be authenticated. The second terminal decrypts the transmitted first value using its key deriving a second value (which equals the random number if the keys are identical.) The second terminal then encrypts its key using the second value as the key, generating a third value which is transmitted back to the first terminal for verification. The first terminal then verifies the third value, either by decrypting it using the random number as the key to obtain its key or by encrypting its key using the random number as key to derive the third number (if the two keys are identical.
    Type: Grant
    Filed: November 18, 1985
    Date of Patent: January 17, 1989
    Assignee: International Business Machines Corporation
    Inventors: Dennis G. Abraham, Glen P. Double, Steven W. Neckyfarow
  • Patent number: 4768892
    Abstract: The present invention relates to an assembly of electromagnetic actuators for the hammers of an impact printer arranged side by side and extending along a line. Each actuator comprises a first stator part formed with at least one pole piece, a second stator part formed with at least one pole piece and positioned relative to the first stator part so that the pole pieces are spaced apart so as to form a gap therebetween. A single coil is associated with one of the stator parts. Each actuator also includes an armature member formed with a body of non-magnetizable material, at least one armature element of magnetizable material and a hammer head. The armature member is supported between the stator parts so that the armature element is located adjacent to the gap. Energization of the coil causes the generation of a flux which passes across the gap and through the armature element tending to move the armature element into the gap and to cause the hammer head to move into a print position.
    Type: Grant
    Filed: June 26, 1986
    Date of Patent: September 6, 1988
    Assignee: International Business Machines Corporation
    Inventors: Douglas S. Brown, William A. Patterson, William D. Thorne
  • Patent number: 4721093
    Abstract: An illumination system for illuminating a line on a document which illumination, when reflected and focused via a lens on a sensor (or image plane), has substantially uniform light intensity along the length of the line. The illumination system includes means for compensation for lens cosine to the fourth power fall-off and an illumination cosine fall-off phenomenon, which has classically been treated as proportional to cosine to the fourth power but in the example of lamps made of coiled tungsten filaments located along the axis of the foci, is more nearly cosine to the 2.8th power. The compensation apparatus includes a cylindrical ellipse for focusing light from two lamps located on an axis which is one foci of the ellipse and the line on the document is located at the other foci of the ellipse. Reflected light from the line on the document is then reflected and focus via a lens onto a sensor. At the sensor, the image is captured for analysis or other uses, e.g.
    Type: Grant
    Filed: June 27, 1986
    Date of Patent: January 26, 1988
    Assignee: International Business Machines Corp.
    Inventors: Michael K. Bullock, Frederick C. Miller
  • Patent number: 4649417
    Abstract: A multilayer ceramic integrated circuit packaging substrate provides a plurality of integrated circuit operating voltages at the integrated circuit mounting surface thereof without requiring a separate input/output pin and internal power distribution plane for every integrated circuit operating voltage. The substrate includes a power via for supplying a first integrated circuit operating voltage at the integrated circuit mounting surface, and a plurality of voltage converting means on the integrated circuit mounting surface for stepping down the first operating voltage to all other requisite operating voltages. The voltage converting means may be resistors or operational amplifier voltage dividers.
    Type: Grant
    Filed: September 22, 1983
    Date of Patent: March 10, 1987
    Assignee: International Business Machines Corporation
    Inventors: Allan C. Burgess, Robert O. Lussow, George E. Melvin
  • Patent number: 4630219
    Abstract: A method for placing a plurality of different size electronic elements having predetermined interconnection requirements thereamong, on a next level electronic package having an array of element placement positions thereon determines optimum placement in a three pass process. In the first pass, all of the elements are treated as if they are the same size, defined as a unit size, and are assigned to element positions on a unit size next level package, then their placement is optimized. These unit size elements are then replaced by macro size elements, which are approximately the actual size of the corresponding electronic elements. The macro size elements are then rearranged for optimal placement on a macro model image, taking their sizes and shapes into account. Finally, the macro size elements are replaced by actual size elements which are placed on an actual size next level package in element positions, and their placement is again optimized. By optimizing element placement in a three pass process, i.e.
    Type: Grant
    Filed: November 23, 1983
    Date of Patent: December 16, 1986
    Assignee: International Business Machines Corporation
    Inventors: Angela DiGiacomo, Kantilal H. Khokhani
  • Patent number: 4597042
    Abstract: A device for loading data in and reading data out of latch strings located in field replaceable units containing the circuitry of a data processing system realized in accordance with the Level-Scan Sensitive Design (LSSD) technique. Each field replaceable unit includes an addressing circuit. The addressing circuits are interconnected by a monitoring loop over which a configuration of address bits is serially transmitted by a control circuit. The data to be loaded and read out propagate in a data loop and are entered in a latch string under control of the addressing circuit.
    Type: Grant
    Filed: September 19, 1983
    Date of Patent: June 24, 1986
    Assignee: International Business Machines Corporation
    Inventors: Didier D. d'Angeac, Michel A. Lechaczynski, Andre Pauporte, Pierre Thery
  • Patent number: 4581537
    Abstract: A method of forming inspection patterns for inspecting a workpiece, e.g., for electron beam inspection of optical photomasks. The inspection patterns are formed from the workpiece patterns themselves by applying a first positive windage to the workpiece patterns, inverting the first positive windaged workpiece patterns and applying a second positive windage to the inverted first positive windaged workpiece patterns. The inspection patterns so produced will contain the requisite guard band and the requisite overlap of abutting patterns.
    Type: Grant
    Filed: March 23, 1984
    Date of Patent: April 8, 1986
    Assignee: International Business Machines Corporation
    Inventors: Wallace J. Guillaume, John F. Loughran, Jan Rogoyski, Robert A. Simpson, Edward V. Weber
  • Patent number: 4578695
    Abstract: A monolithically integrated resistive attenuator is autobiased from an input bipolar signal the amplitude of which is higher than the integrated circuit voltage supplies. The resistive attenuator is arranged in a first pocket formed in an epitaxial layer, and is connected between the input bipolar signal and ground. An intermediate tap produces an output signal. A diode and capacitor are formed in a second pocket. The diode is connected between the input bipolar signals and the epitaxial layer while the capacitor is connected between the epitaxial layer and the isolation walls thereof. The positive half-periods of the input bipolar signal charges the capacitor, which in turn biases the epitaxial layers. The attenuator, therefore, can be monolithically integrated into a silicon chip and remain isolated for all values of the input bipolar signal.
    Type: Grant
    Filed: November 21, 1983
    Date of Patent: March 25, 1986
    Assignee: International Business Machines Corporation
    Inventors: Francois-Xavier Delaporte, Gerard M. Lebesnerais, Jean-Pierre Pantani
  • Patent number: 4553049
    Abstract: Integrated circuit logic chips often oscillate during testing because the large unbypassed inductance of the test fixture causes off-chip driver switching noise to be fed back to the logic chip power supply. Oscillation may be prevented by adding an inhibit receiver and an off-chip driver inhibit network to the logic chip. The off-chip driver inhibit network provides a fan out path from the inhibit receiver to each off-chip driver. In response to an inhibit signal applied to the inhibit receiver, the inhibit network forces each of the off-chip drivers to the same logical state, the logic state being the natural logic state assumed by the off-chip drivers upon initial application of power to the chip. The driver inhibit receiver and inhibit network are employed to prevent oscillation at chip power-on, during driver and receiver parametric testing and during input test pattern tests.
    Type: Grant
    Filed: October 7, 1983
    Date of Patent: November 12, 1985
    Assignee: International Business Machines Corporation
    Inventors: Charles W. Cha, John W. Hartman, David A. Kiesling, William J. Scarpero, Jr.
  • Patent number: 4544846
    Abstract: A variable axis immersion lens electron beam projection system shifts the electron beam while eliminating rapidly changing fields, eddy currents and stray magnetic fields in the target area. The electron beam projection system includes an electron beam source and a deflection means. A variable axes immersion lens for focusing the electron beam includes an upper pole piece, and a lower pole piece having a non-zero bore section, a zero bore section and an opening therebetween for inserting the target into the lens. The variable axis immersion lens provides an axial magnetic projection field which has zero first derivative in the vicinity of the target area. A magnetic compensation yoke, positioned within the bore of the upper pole piece produces a magnetic compensation field which is proportional to the first derivative of the axial magnetic projection field.
    Type: Grant
    Filed: June 28, 1983
    Date of Patent: October 1, 1985
    Assignee: International Business Machines Corporation
    Inventors: Gunther O. Langner, Hans C. Pfeiffer, Maris A. Sturans
  • Patent number: 4542579
    Abstract: In the fabrication of integrated circuits, a method is provided for forming dielectrically isolated regions in a semiconductor substrate comprising forming over the semiconductor substrate surface an electrically insulating layer of dielectric material having a plurality of openings therethrough and etching to form recesses in the semiconductor substrate exposed in the openings. Then, aluminum is deposited over the substrate so that an aluminum layer is formed on said layer of dielectric material as well as in said recesses. Next, the aluminum in the recesses is selectively anodized to form aluminum oxide, and the remaining aluminum on said layer of dielectric material is removed either by selectively etching away the aluminum layer or by a "lift-off" technique wherein the insulating layer of dielectric material under the aluminum is etched away thereby "lifting-off" and removing the aluminum.
    Type: Grant
    Filed: June 30, 1975
    Date of Patent: September 24, 1985
    Assignee: International Business Machines Corporation
    Inventors: Michael R. Poponiak, Robert O. Schwenker
  • Patent number: 4542481
    Abstract: An improved one-device random access memory cell comprises a transistor and a capacitor, with one of the transistor's controlled electrodes being connected to one of the capacitor plates to form a storage node. The storage node is maintained at either a first or a second voltage level depending upon the binary state of the cell.The other capacitor plate is connected to a voltage level which is approximately midway between the first and second voltage levels so that the maximum voltage across the capacitor is reduced to one half the voltage of prior art cells wherein the other capacitor plate was grounded or maintained at the memory power supply voltage level. By halving the maximum voltage across the capacitor, the capacitor dielectric thickness may be halved to thereby double the capacitance per unit area without exceeding the capacitor dielectric breakdown field strength.
    Type: Grant
    Filed: January 31, 1983
    Date of Patent: September 17, 1985
    Assignee: International Business Machines Corporation
    Inventor: Russell C. Lange
  • Patent number: 4542509
    Abstract: A method and apparatus for fault testing a clock distribution network which provides a plurality of clock signal lines to the logic networks which comprise a data processor. The fault testing apparatus includes a decoder for selecting one of the clock signal lines to be tested, and a test latch which is clocked by the selected clock signal line. The selected clock signal line is tested by setting the test latch to a first logic value (e.g., binary ZERO) and maintaining a second logic value (e.g., binary ONE) at the test latch input. If the second logic value is stored in the test latch when the clock distribution network is inhibited, then a stuck-on fault is indicated for the selected clock signal line. If the second logic value fails to be stored in the test latch when the clock distribution network is enabled, then a stuck-off fault is indicated for the selected clock signal line. Each clock signal line in the clock distribution network may be tested in this manner.
    Type: Grant
    Filed: October 31, 1983
    Date of Patent: September 17, 1985
    Assignee: International Business Machines Corporation
    Inventors: Gregory S. Buchanan, John J. DeFazio
  • Patent number: 4539058
    Abstract: A method and apparatus for forming multilayer ceramic substrates from large area ceramic green sheets, each having an array of layer sites thereon, by serially aligning each individual layer site with respect to a die cavity and punching the aligned layer site into the die cavity to thereby stack the requisite number of aligned layer sites. Individual layer site alignment ensures that each layer site is aligned with respect to the die cavity so that the dimensional tolerances between layer sites on the large area green sheet are eliminated. Thus, as large a green sheet as is cost effective may be employed, notwithstanding the fact that dimensional distortions on the large area green sheet would preclude alignment of corresponding layer site vias on superimposed large area green sheets.
    Type: Grant
    Filed: December 12, 1983
    Date of Patent: September 3, 1985
    Assignee: International Business Machines Corporation
    Inventors: Allan C. Burgess, Robert A. Magee, George E. Melvin
  • Patent number: 4506351
    Abstract: An improved one-device random access memory comprises an array of memory cells arranged in rows and columns. Each cell comprises a transistor and a capacitor, with one of the transistors controlled electrodes being connected to one of the capacitor plates. The controlling electrodes of all the transistors in a column are connected to a word line. The other controlled electrodes of all the transistors in a row are connected to a bit line, while the other plate of all the capacitors in a row are connected to a sense line. Each row also includes a differential sense amplifier coupled between the bit and sense lines. Each row also includes a dummy cell connected to the sense line, the dummy cell having a capacitor of the same sense as the cell capacitor, and storing the same charge thereon as a cell capacitor.The memory is fabricated on a semiconductor substrate, and the bit line capacitance is made substantially greater than the sense line capacitance.
    Type: Grant
    Filed: June 23, 1982
    Date of Patent: March 19, 1985
    Assignee: International Business Machines Corporation
    Inventors: Roy E. Scheuerlein, Seiki Ogura
  • Patent number: 4489863
    Abstract: A micro dispense valve arrangement for accurately dispensing minute quantities of a fluid. The valve arrangement interfaces an enclosed interior region under pressure with an exterior region of less pressure through an orifice opening. The orifice wall is tapered from interior to exterior to bound a frustoconical region constricting toward the exterior to accommodate a magnetizable pellet or ball. The ball is held in its seated position against the orifice wall by permanent magnets imbedded in the wall. An AC coil surrounding the orifice opening acts when energized to cause the ball to move between its seated or closed position and a non-magnetizable screen in its open position. The frequency and duration of applied positive and negative pulses driving the coil act to control the on/off fluid flow duty cycle of the valve.
    Type: Grant
    Filed: February 11, 1982
    Date of Patent: December 25, 1984
    Assignee: International Business Machines Corporation
    Inventors: Leonard A. Horchos, Harold W. Lorber