Patents Represented by Attorney, Agent or Law Firm Morin & Oshinsky, LLP
  • Patent number: 7206002
    Abstract: An image processing apparatus includes a spatial filtering unit which applies spatial filtering to input image data to generate filtered image data such that the spatial filtering provides a broader dynamic range for outputs than for inputs, and a high-resolution conversion unit which interpolates the filtered image data in a first direction by an average of values of two pixels adjacent in the first direction, in a second direction perpendicular to the first direction by an average of values of two pixels adjacent in the second direction, and in a direction diagonal to the first and second directions by an average of four pixels surrounding a pixel of interest, thereby converting the filtered image data into high-resolution image data.
    Type: Grant
    Filed: November 27, 2002
    Date of Patent: April 17, 2007
    Assignee: Ricoh Company, Ltd.
    Inventor: Hiroyuki Kawamoto
  • Patent number: 7187018
    Abstract: A pixel cell having a reduced potential barrier near a region where a gate and a photodiode are in close proximity to one another, and a method for forming the same are disclosed. Embodiments of the invention provide a pixel cell comprising a substrate. A gate of a transistor is formed at least partially below the surface of the substrate and a photodiode is adjacent to the gate. The photodiode comprises a doped surface layer of a first conductivity type, and a doped region of a second conductivity type underlying the doped surface layer. The doped surface layer is at least partially above a level of the bottom of the gate.
    Type: Grant
    Filed: June 25, 2003
    Date of Patent: March 6, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Chandra Mouli, Howard E. Rhodes
  • Patent number: 7176079
    Abstract: A method of fabricating a semiconductor device includes depositing a dielectric film and subjecting the dielectric film to a wet oxidation in a rapid thermal process chamber. The technique can be used, for example, in the formation of various elements in an integrated circuit, including gate dielectric films as well as capacitive elements. The tight temperature control provided by the RTP process allows the wet oxidation to be performed quickly so that the oxidizing species does not diffuse significantly through the dielectric film and diffuse into an underlying layer. In the case of capacitive elements, the technique also can help reduce the leakage current of the dielectric film without significantly reducing its capacitance.
    Type: Grant
    Filed: July 26, 2001
    Date of Patent: February 13, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Ronald A. Weimer, Scott J. DeBoer, Dan Gealy, Husam N. Al-Shareef
  • Patent number: 7166879
    Abstract: A photogate-based photosensor for use in a CMOS imager exhibiting improved short wavelength light response. The photogate is formed of a thin conductive layer about 50 to 3000 Angstroms thick. The conductive layer may be a silicon layer, a layer of indium and/or tin oxide, or may be a stack having an indium and/or tin oxide layer over a silicon layer. The thin conductive layer of the photogate permits a greater amount of short wavelength light to pass through the photogate to reach the photosite in the substrate, and thereby increases the quantum efficiency of the photosensor for short wavelengths of light.
    Type: Grant
    Filed: April 8, 2002
    Date of Patent: January 23, 2007
    Assignee: Micron Technology, Inc.
    Inventor: Howard E. Rhodes
  • Patent number: 7163893
    Abstract: A high integrity, reliable liner is disclosed for a via in which a titanium aluminide layer is preformed as a lining within a via hole prior to deposition of other conductive materials within the via hole. The conductive materials deposited on the preformed titanium aluminide can be either a secondary barrier layer portion of the liner, such as a titanium compound layer, which in turn has a metal plug deposited thereon, or, alternatively, a metal plug directly deposited on the titanium aluminide layer. An important advantage achieved by the present invention is that a via is formed with a substantial elimination of void formation. The enhanced vias are useful in a wide variety of semiconductor devices, including SRAMS and DRAMs.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: January 16, 2007
    Assignee: Micron Technology, Inc.
    Inventor: Shane P. Leiphart
  • Patent number: 7158893
    Abstract: A main object is to cope with an unknown structure substance thereby to identify the structure of a parent ion highly precisely and to derive a supposed structure. A method for analyzing mass spectrometric data is disclosed, which: acquires mass spectrometric data on an ionized sample and dissociated ions dissociated from the sample as a parent ion; derives dissociated ion candidates by analyzing the molecular orbits on the candidates of the structures of the parent ion; and displays the analytical results of the parent ion candidates and the dissociated ion candidates and compares the data of the dissociated ion candidates and the data of dissociated ions actually measured, to evaluate the structures of the parent ion candidates.
    Type: Grant
    Filed: November 22, 2004
    Date of Patent: January 2, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Kiyomi Yoshinari, Kinya Kobayashi, Lee Chahn
  • Patent number: 7145171
    Abstract: A probe unit comprises a flexible substrate made of an inorganic substance and having an almost straight edge, an electro conductive film formed on a surface of the substrate and having a plurality of contact parts aligned on a surface of the edge and can contact with electrodes of a sample and lead parts connected to the contact parts, wherein the substrate is elastically deformed together with the contact part while the plurality of the contacts parts are supported by the edge when a force is added to press a surface of the contact part.
    Type: Grant
    Filed: April 27, 2004
    Date of Patent: December 5, 2006
    Assignee: Yamaichi Electronics Co., Ltd.
    Inventors: Masahiro Sugiura, Toshitaka Yoshino, Shuichi Sawada
  • Patent number: 7142577
    Abstract: A multi-layered reflective mirror formed of spaced-apart plate-shaped empty space patterns formed within a substrate is disclosed. The plurality of plate-shaped empty space patterns are formed by drilling holes in the substrate and annealing the substrate to form the spaced-apart plate-shaped empty space patterns.
    Type: Grant
    Filed: May 16, 2001
    Date of Patent: November 28, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Joseph E. Geusic, Eugene P. Marsh
  • Patent number: 7133472
    Abstract: A high-speed turbo decoder using a BCJR (Bahi, Cocke, Jelinek, and Raviv) algorithm or a BCJR algorithm which makes approximation by ACS computation (Add-Compare-Select computation) includes a supplier for supplying a plurality of pipelined stages of gamma metrics as a section for performing at least one of alpha metric computation and beta metric computation in the BCJR algorithm, an ACS computation portion which is constituted by a plurality of stages of cascade connections and receives the plurality of pipelined gamma metrics, a receiver that receives a computation result obtained by the ACS computation portion and updates state metrics every plurality of stages (K stages), and a memory for storing state metrics for every K stages.
    Type: Grant
    Filed: May 11, 2001
    Date of Patent: November 7, 2006
    Assignee: NEC Corporation
    Inventor: Tsuguo Maru
  • Patent number: 7116329
    Abstract: An image processing method is disclosed for more effectively displaying movements of an object composed of a plurality of polygons. The image processing method displays a moving object by displacing backward given vertices of polygons composing the moving object, imparting an afterimage representation that makes the object look as if it leaves a trail in the direction opposite to their direction of movement. This allows for display of movements of the object in a more emphasized manner and display of the moving object with richer expression.
    Type: Grant
    Filed: November 12, 2003
    Date of Patent: October 3, 2006
    Assignee: Sega Corporation
    Inventors: Ryuta Ueda, Kazuhisa Hasuoka
  • Patent number: 7116133
    Abstract: The present invention provides a clock signal input circuit that is able to provide inverse internal clock signals generated by the same input buffer as the address and data signals which exhibit reduced skew. When a skewed external noninverse clock signal and a corresponding external inverse clock signal are passed through respective reference voltage input buffers there is no reduction in skew between the two internal signals. In a preferred embodiment, the invention provides back to back inverters connected to both lines carrying the noninverted and inverted internal clock signals. The slower internal clock signal has an extra inverter driving it when it switches states and the faster internal clock signal has an extra inverter fighting it when it switches states. The skew of the two signals is reduced, allowing for faster operation of the integrated circuit and a reduction in misread data signals.
    Type: Grant
    Filed: June 18, 2004
    Date of Patent: October 3, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Christopher K. Morzano
  • Patent number: 7112484
    Abstract: An integrated programmable conductor memory cell and diode device in an integrated circuit comprises a diode and a glass electrolyte element, the glass electrolyte element having metal ions mixed or dissolved therein and being able to selectively form a conductive pathway under the influence of an applied voltage. In one embodiment, both the diode and the memory cell comprise a chalcogenide glass, such as germanium selenide (e.g., Ge2Se8 or Ge25Se75). The first diode element comprises a chalcogenide glass layer having a first conductivity type, the second diode element comprises a chalcogenide glass layer doped with an element such as bismuth and having a second conductivity type opposite to the first conductivity type and the memory cell comprises a chalcogenide glass element with silver ions therein. In another embodiment, the diode comprises silicon and there is a diffusion barrier layer between the diode and the chalcogenide glass memory element.
    Type: Grant
    Filed: December 6, 2004
    Date of Patent: September 26, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Terry L. Gilton
  • Patent number: 7113384
    Abstract: A dynamic degaussing system includes a magnetic field sensor for generating a sensor signal in response to a sensed magnetic field. The magnetic sensor is coupled to a controller that produces an output signal based on the sensor signal. The controller may include feedforward and feedback control loops. The output signal of the controller controls a magnetic field generator which generates a magnetic field so as to attenuate the sensed magnetic field. According to one aspect of the invention, a vessel is provided with a reduced magnetic signature and a control system for controlling magnetic fields about a podded electric motor. The control system employs feed-forward and feedback control in tandem. The control system may be dynamically adapted to changing physical characteristics of the motor. Control signals are generated in response to sensed or predicted magnetic fields internal to, or external to, the motor.
    Type: Grant
    Filed: May 8, 2003
    Date of Patent: September 26, 2006
    Assignee: VSSL Commercial, Inc.
    Inventors: Malcolm A. Swinbanks, Christopher E. Ruckman, John M. Holford
  • Patent number: 7110792
    Abstract: A mobile communication device with security mechanisms is provided for enabling wireless personal information transfer with increased security. In another embodiment of the invention, a mobile communication device is used to confirm a transaction.
    Type: Grant
    Filed: May 19, 2004
    Date of Patent: September 19, 2006
    Inventor: Einar Rosenberg
  • Patent number: 7110598
    Abstract: An electronic imaging system operates as closely as possible to the cone spectral response space to obtain a human eye-like long, medium, short (LMS) wavelength response. An input image, for example, red-green-blue (RGB), is transformed to an LMS color space similar to the human long-, middle-, and short-wavelength cone receptor responses. Adaptation levels for each LMS component are calculated. The adaptation levels are then used to adjust the sensitivity of each LMS sensor response to obtain an LMS component image. The LMS component image then is transformed back to an RGB component image for further processing or display.
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: September 19, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Shane Ching-Feng Hu
  • Patent number: 7105793
    Abstract: Embodiments of the invention provide pixel cells that allow both automatic light control and correlated double sampling operations. The pixel cell includes first and second photo-conversion devices that can be separately read out. For example, the second photo-conversion device can be the pixel cells' floating diffusion region, with an area and doping profile suitable for photo-conversion. An image sensor may include an array of pixel cells, some or all of which have two photo-conversion devices, and peripheral circuitry for reading out signals from the pixel cells. The image sensor's readout circuitry may monitor charge generated by the second photo-conversion devices to determine when to read out signals from the first photo-conversion devices.
    Type: Grant
    Filed: October 22, 2003
    Date of Patent: September 12, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Howard E. Rhodes
  • Patent number: D528444
    Type: Grant
    Filed: June 14, 2004
    Date of Patent: September 19, 2006
    Assignee: Omron Corporation
    Inventors: Kenji Horie, Hajime Takegawa
  • Patent number: D531200
    Type: Grant
    Filed: June 14, 2004
    Date of Patent: October 31, 2006
    Assignee: Omron Corporation
    Inventors: Atsushi Taneno, Hajime Takegawa
  • Patent number: D540044
    Type: Grant
    Filed: March 14, 2005
    Date of Patent: April 10, 2007
    Assignee: Arquest, Inc.
    Inventors: Charles F. Schroer, Jr., M. Reid Macfarlan, Matthew J. Rinaldi
  • Patent number: D543037
    Type: Grant
    Filed: February 17, 2005
    Date of Patent: May 22, 2007
    Inventor: Renay Freedman