Abstract: A computer analyzes a process for fabricating a plurality of semiconductor wafers. The process has a plurality of processing steps, performed on various fabrication machines. The program is knowledge based, and is trained using training data, which may be generated by a simulator. A decision tree is generated, based on the training data. A plurality of input data representing characteristics of the semiconductor wafers are extracted. A first order pattern in any of the processing steps is identified using a decision tree, based on the input data. A plurality of probability distribution functions are formed for each characteristic. Each distribution function identifies a probability that a particular type of order pattern is present. A threshold is based on the plurality of probability distribution functions. A second order pattern in any of the processing steps is identified by comparing the data representing characteristics to the threshold.
Type:
Grant
Filed:
December 14, 1998
Date of Patent:
January 1, 2002
Assignee:
Agere Systems Guardian Corp.
Inventors:
Almudena Fernandez Perez, Victorino Martin Santa Maria, Miguel Angel Merino Alonso, Julian Moreno Garrido, Miguel Recio Segoviano