Patents Represented by Attorney, Agent or Law Firm Moser Paterson & Sheridan, LLP
  • Patent number: 6598316
    Abstract: A line for processing semiconductor wafers into integrated circuits (ICs) is provided with an input-output (I-O) chamber to help purge residual contamination from the wafers before they are transferred into a processing line. After a cassette containing semiconductor wafers is placed in the chamber, it is sealed from the line and from the atmosphere. Then a dry inert gas such as nitrogen is dispersed into the top of the chamber to form a covering blanket around the wafers to displace and sweep away contaminants such as air-borne particles, moisture and organic vapors. While the purge gas is flowing, gasses and residual contamination are exhausted from the bottom of the chamber at a relatively slow rate until an intermediate pressure level is reached at which pressure droplets of liquid from residual moisture and vapor can no longer condense. Then the flow of purge gas is stopped and the pressure within the chamber is relatively quickly reduced to a base operating value (e.g.
    Type: Grant
    Filed: May 2, 2002
    Date of Patent: July 29, 2003
    Assignee: Applied Materials, Inc.
    Inventor: Alan Hiroshi Ouye