Abstract: A method for controlling etch processes during fabrication of semiconductor devices comprises tests and measurements performed on non-product and product substrates to define an N-parameter CD control graph that is used to calculate a process time for trimming a patterned mask to a pre-determined width. An apparatus for performing such a method.
Abstract: Transistor gate linewidths can be made to be effectively smaller by etching a notch at the bottom of the gate to reduce the effective linewidth. This can be done by etching at a layer interface, such as a silicon-germanium interface in an over-etch step.
Abstract: An apparatus for reducing by-product formation in a semiconductor wafer-processing chamber. In a first embodiment, the apparatus comprises a chuck having a chucking electrode and a radially extending peripheral flange. A collar is disposed over the peripheral flange defining a first gap therebetween, and circumscribes the chuck. A heater element is embedded within the collar and adapted for connection to a power source. In a second embodiment, the apparatus comprises a chuck having a chucking electrode and a radially extending peripheral flange, and a collar having a heater element embedded therein. The collar is disposed over the peripheral flange to define a gap therebetween, and circumscribes the chuck. Moreover, a pedestal having a gas delivery system therein is disposed below the chuck and collar. In a third embodiment, the apparatus comprises a chuck having a chucking electrode and a radially extending peripheral flange, a collar, and a waste ring having a heater element embedded therein.
Type:
Grant
Filed:
May 15, 2001
Date of Patent:
September 21, 2004
Inventors:
Dennis Grimard, Arnold Kholodenko, Alex Veytser, Senh Thach, Wing Cheng
Abstract: A method and apparatus for preventing leakage from a fitting coupling a first and second fluid supply line to an environment surrounding the fitting is generally provided. In one embodiment, a containment apparatus includes a body having a first, second and third aperture formed therethrough. The body defines interior volume that is adapted to substantially enclose the fitting. The interior volume is adapted to be maintained at a pressure less than the surrounding environment to prevent fluid that may leak from the fitting from being released into the surrounding environment. In another aspect of the invention, a method for preventing fluid leakage from a fitting coupling a first and second conduit from entering an environment surrounding the fitting includes enclosing the fitting in a volume defined between a first shell and a second shell, evacuating the volume, and drawing air into the volume from between the shells.
Abstract: A method of fabricating an interconnect line comprises forming a wall, depositing an etch mask having a thickness that decreases towards a bottom of the wall, and isotropically etching the wall at the bottom to form the interconnect line having a pre-determined gap between the substrate and a bottom of the line.
Type:
Grant
Filed:
April 7, 2003
Date of Patent:
July 27, 2004
Inventors:
Chan-syun David Yang, Ajay Kumar, Wei-Te Wu, Changhun Lee, Yeajer Arthur Chen, Katsuhisa Kugimiya
Abstract: A method of fabricating a gate structure of a field effect transistor, comprising forming a hard mask, etching a gate electrode, and contemporaneously forming a gate dielectric and removing the hard mask.