Abstract: Embodiments of the present invention provide for a noise-reducing blower structure in which a fan-housing is disposed on an expansion card and juxtaposed to a heat sink. The heat sink is disposed on the expansion card and resides within a rigid frame above a processing unit chip. A fan that circulates air is disposed on the expansion card within the fan-housing. A duct is disposed on the expansion card, covering the heat sink and the fan-housing, and the duct is mechanically separated from the fan-housing for reducing vibration noises. By placement of the fan next to the heat sink, and not on top of it, the fan can be made larger to thereby rotate at slower speeds.

Abstract: A method and system of fractional biasing of semiconductors. A small negative voltage is applied to the back of a semiconductor wafer or device. An operating voltage is applied to the semiconductor. Operating characteristics of the semiconductor are enhanced by application of a fractional bias.

Abstract: Checking the consistency of a lock step process while debugging a microcontroller code is in progress. A method provides a production microcontroller to execute an instruction code and provides the result of the instruction code to an ICE. The ICE, independent from the production microcontroller and simultaneously, executes the same instruction code and produces a result. The ICE compares the result of its computation and the result received from the production microcontroller. The ICE issues a “lock step error” when the result of the comparison is a mismatch. A trace buffer residing in the host device provides the location of the line of code causing the mismatch. After identifying the line of code causing the mismatch the user debugs the erroneous line of code. The debugging process resumes on the next line of code in the microcontroller code under test.

Abstract: A semiconductor package includes a leadframe which is cup-shaped and holds a semiconductor die. The leadframe is in electrical contact with a terminal on one side of the die, and the leads of the leadframe are bent in such a way that portions of the leads are coplanar with the other side of the die, which also contains one or more terminals. A plastic capsule is formed around the leadframe and die.

Abstract: A system and method for graphically displaying global resources and their associated parameter values and apply the global resources across multiple design projects. The system and method also provide a graphical interface which displays the possible parameter values of an associated global resource. This graphical interface utilizes pop up menu to for viewing the possible parameter values and the selection of the current parameter value. The system and method also provide tracking and updating of the hardware resources which utilize the parameter values of the global resources. Further, the system also allows the storage of these parameters values of the global resources. By storing these parameter values of the global resources, these parameter values can be set as default global settings. These default global settings can be recalled and associated with different projects without manual entry of the parameter values.

Abstract: A digitally controlled hybrid power module is controlled by a programmable controller. The hybrid power module includes a digitally controlled switching supply with an output coupled to an input of a digitally controlled linear voltage regulator. Independent control of switching supply and the linear regulator is provided by the programmable controller, which may be a field programmable gate array (FPGA), microcontroller, or digital signal processor (DSP). The programmable controller may independently control one or more power modules. Each power module may also include enable switching and an associated current clamp for capacitive loads. An output voltage transient suppressor may also be used to control transients, such as those produced under fast switching conditions.

Abstract: Systems and methods for reducing temperature dissipation during burn-in testing are described. A plurality of devices under test are each subject to a body bias voltage. The body bias voltage is selected to substantially minimize leakage current associated with the plurality of devices under test. Accordingly, heat dissipation is reduced during burn-in.

Abstract: An invention is provided for rendering using an omnidirectional light. A shadow cube texture map having six cube faces centered by a light source is generated. Each cube face comprises a shadow texture having depth data from a perspective of the light source. In addition, each cube face is associated with an axis of a three-dimensional coordinate system. For each object fragment rendered from the camera's perspective a light-to-surface vector is defined from the light source to the object fragment, and particular texels within particular cube faces are selected based on the light-to-surface vector. The texel values are tested against a depth value computed from the light to surface vector. The object fragment is textured as in light or shadow according to the outcome of the test.

Abstract: In one embodiment of the present invention, a method for fabricating semiconductor devices comprises forming an active region about a front-side of a substrate. A plurality of trenches are then formed about a back-side of the substrate. A grid of banks separates the trenches. A conductive material is then applied to the back-side of the substrate. The trenches and the conductive material act to reduce the on-state resistance of the substrate and enhance thermal conductivity, while the grid of banks maintains the structural strength of the wafer.

Abstract: The present invention is a circuit for controlling current. In one embodiment, the high reference voltage input of a digital to analog converter is coupled with a reference voltage source which provides a positive reference voltage. A resistive load is coupled to an output of the digital to analog converter and to a circuit output pin. A sensing device couples the circuit output pin with the low reference voltage input of the digital to analog converter and to a reference ground input of the voltage source. The positive reference voltage, low reference voltage, and reference ground voltage are changed in response to the sensing device detecting a change in the output voltage.

Abstract: An encapsulation technique for leadless semiconductor packages entails: (a) attaching a plurality of dice (411) to die pads in cavities (41-45, 51-55) of a leadframe, the cavities arranged in a matrix of columns and rows; (b) electrically connecting the dice to a plurality of conducting portions (412-414) of the leadframe; and (c) longitudinally injecting molding material into the cavities along the columns via a plurality of longitudinal gates (46-49, 56-59) of the leadframe to package the dice in the cavities, the longitudinal gates situated between the cavities along the columns.

Abstract: A method and system for a source device to simultaneously perform authentication and key exchange (hereinafter referred to as “AKE”) protocols with multiple sink devices. In a communication network that comprises a source device and multiple sink devices in compliance with the 5C Digital Transmission Content Protection specification, the present invention discloses a method and system for using a multiple client state machine comprising a multiple client state machine table to allow the source device to track at which stage each sink device is undergoing within a 5C DTCP AKE protocol. Specifically, an embodiment allows the source device to receive an audio/video control command or response associated with the 5C DTCP AKE protocol from a particular sink device, access the table to determine at which stage that sink is undergoing within the 5C DTCP AKE protocol, and process the AV/C command or response depending on that stage.

Abstract: A configurable input/output interface for a microcontroller. The present invention is an input/output (I/O) pin with a configurable interface to a microprocessor, and to a global mapping which selectively couples functional units on the microcontroller with the I/O pin. The I/O pin can be selectively coupled to the global mapping or to the microprocessor on each clock cycle. The mapping configuration selectively couples a different functional unit or units of the microcontroller to access the I/O pin on each clock cycle. The interface between the I/O pin and the rest of the system can be dynamically configured by software created or modified by a user, or by hardware. The present invention facilitates repositioning pin locations on a microcontroller because it is a software modification rather than a hardware modification. The present invention further enables the microcontroller functions to be configured by the user rather than by the microcontroller vendor.