Patents Represented by Attorney Murray Smith
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Patent number: 8350590Abstract: A technique is provided that involves: configuring a clock generation circuit to output a first signal having a first frequency that is one of a plurality of frequencies that are different; generating in a clock section of a further circuit as a function of the first signal a second signal having a second frequency that is one of the plurality of frequencies other than the first frequency; and configuring the clock section to supply to the further circuit a clock signal that is one of the first and second signals.Type: GrantFiled: January 27, 2010Date of Patent: January 8, 2013Assignee: Xilinx, Inc.Inventors: Schuyler E. Shimanek, Wayne E. Wennekamp, Charles D. Laverty, Roger D. Flateau, Jr., John O'Dwyer
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Patent number: 8307182Abstract: An embodiment of a technique to transfer data includes: operating a memory interface using memory access cycles that each include T successive time slots each provided for transfer of B bits of data, where T and B are positive integers; selecting one of first or second predetermined integers as one of T or B; and transferring a quantity of data Q between the memory interface and another interface. The transferring includes: automatically determining a value of M memory access cycles as a function of the one of T or B; causing a data transfer sequence on the memory interface that includes M successive memory access cycles and thus M·T time slots; automatically determining a subset of the M·T time slots as a function of the one of T or B; and transferring the quantity of data Q through the memory interface during the subset of time slots.Type: GrantFiled: January 19, 2010Date of Patent: November 6, 2012Assignee: Xilinx, Inc.Inventors: Roger D. Flateau, Jr., Thomas H. Strader, Adam Elkins, Wayne E. Wennekamp, Schuyler E. Shimanek
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Patent number: 8239590Abstract: An embodiment of a technique to transfer data between two different interfaces is disclosed. The embodiment of the technique includes: manipulating data arriving at a first data interface with a first word width into data with a second word width; transferring the manipulated data to a second data interface having the second word width; and selecting one of a plurality of different word widths for one of the first or second word widths.Type: GrantFiled: January 19, 2010Date of Patent: August 7, 2012Assignee: Xilinx, Inc.Inventors: Wayne E. Wennekamp, Adam Elkins, Schuyler E. Shimanek, Steven E. McNeil
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Patent number: 8239604Abstract: Some embodiments involve a circuit having first and second interfaces, and configurable structure to identify a selected integer number that is one of a plurality of different integer numbers associated with respective different configurations. In one embodiment, a conversion section organizes lines of the second interface into line groups equal in number to the selected integer number, and carries out a conversion operation in which it supplies to each line group a respective incoming data segment received through the first interface. In another embodiment, a conversion section organizes the lines of the first interface into line groups equal in number to the selected integer number, and carries out a conversion operation in which it supplies to the second interface a respective incoming data segment from each line group.Type: GrantFiled: January 29, 2010Date of Patent: August 7, 2012Assignee: Xilinx, Inc.Inventors: Schuyler E. Shimanek, Joe E. Leyba, Wayne E. Wennekamp
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Patent number: 8222923Abstract: A technique is provided for memory control in a device having programmable circuitry, including providing a dedicated memory controller circuit in the device before the programmable circuitry is field programmed. Another technique involves fabricating a device, where the fabricating involves forming programmable circuitry that includes a dedicated memory controller circuit before the circuitry is field programmed.Type: GrantFiled: January 27, 2010Date of Patent: July 17, 2012Assignee: Xilinx, Inc.Inventors: Schuyler E. Shimanek, Wayne E. Wennekamp, Joe E. Leyba, Adam Elkins, Thomas H. Strader, Chidamber R. Kulkarni, Mikhail A. Wolf, Steven E. McNeil
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Patent number: 8200874Abstract: A device has first circuitry and also second circuitry that includes an interface and command ports that can each receive commands from the first circuitry, each command requesting an information transfer through the interface. A technique relating to the device involves dynamically enabling and disabling at least one of the command ports under control of the first circuitry, and using a priority list specifying an order of priority for a group of the command ports to identify and cause a command to be accepted from the command port of highest priority that contains a command and is currently enabled.Type: GrantFiled: January 27, 2010Date of Patent: June 12, 2012Assignee: Xilinx, Inc.Inventors: Wayne E. Wennekamp, Adam Elkins, Schuyler E. Shimanek, Thomas H. Strader, Steven E. McNeil
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Patent number: 8161249Abstract: An apparatus includes a programmable device that has an interface and command ports that can each receive commands, each command requesting an information transfer through the interface. A technique relating to the device involves: selecting during field programming a number of priority definitions; configuring each of the priority definitions during field programming to specify an order of priority for a group of the command ports; and using the priority definitions in succession and, for each of the priority definitions, causing a command to be accepted from the command port of highest priority that contains a command.Type: GrantFiled: January 27, 2010Date of Patent: April 17, 2012Assignee: Xilinx, Inc.Inventors: Adam Elkins, Thomas H. Strader, Wayne E. Wennekamp, Schuyler E. Shimanek
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Patent number: 8079002Abstract: An embodiment of the invention involves: providing a database that includes layout information representing a layout within an integrated circuit of an electrical circuit; identifying from the information in the database each conductive path of a selected type in the electrical circuit; extracting layout information from the database for each conductive path of the selected type; and calculating an electrical parameter for each conductive path of the selected type, as a function of the layout information obtained for that conductive path during the extracting. In addition, in a different configuration of the embodiment, a report can be generated containing information based on the electrical parameter calculated during the calculating for at least one of the conductive paths of the selected type.Type: GrantFiled: December 24, 2008Date of Patent: December 13, 2011Assignee: Xilinx, Inc.Inventors: Kuok-Khian Lo, Mark B. Roberts, Mohammed Fakhruddin, James Karp, Richard P. Burnley, Min-Hsing Chen
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Patent number: 8063660Abstract: A technique is applicable to a device having programmable circuitry that includes a first interface having a plurality of first address terminals, a second interface having a plurality of second address terminals, and a configurable interconnect structure coupled between the first and second interfaces. The technique includes configuring the interconnect structure during field programming to electrically couple each of the address terminals in a first subset of the first address terminals to respective address terminals in a second subset of the second address terminals according to a selected one of a plurality of different mapping functions.Type: GrantFiled: January 28, 2010Date of Patent: November 22, 2011Assignee: Xilinx, Inc.Inventors: Thomas H. Strader, Roger D. Flateau, Jr., Schuyler E. Shimanek, Wayne E. Wennekamp, Adam Elkins
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Patent number: 7971115Abstract: A circuit has first portion that receives data at a first rate; a second portion that outputs data at a second rate synchronized to and different from the first rate; a third portion that transfers data from the first portion to the second portion; and a fourth portion that generates an error detected signal in response to a disruption in the synchronism between the first and second rates. A different aspect involves a method that includes: receiving data at a first rate in a first portion; transferring data from the first portion to a second portion; outputting data at a second rate from the second portion, the second rate being synchronized to and different from the first rate; and generating an error detected signal in response to detection of a disruption in the synchronism between the first and second rates.Type: GrantFiled: May 28, 2009Date of Patent: June 28, 2011Assignee: Xilinx, Inc.Inventors: Madan M. Patra, Paul T. Sasaki
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Patent number: 7859936Abstract: A method and apparatus involving a circuit is disclosed. The circuit has separate first and second portions, where the first portion includes a first memory device such as a flip-flop, and the second portion includes a second memory device such as a latch. The first portion is selectively operated in first and second operational modes, the first portion consuming less power in the second operational mode than in the first operational mode. During the first operational mode a logical value is maintained in the flip-flop and can vary dynamically. During the second operational mode, the state that the logical value had at a point in time just before the first portion entered the second operational mode is maintained in the latch. Then, after the first portion switches from the second operational mode back to the first operational mode, the state of the logical value in the latch is restored to the flip-flop.Type: GrantFiled: January 26, 2009Date of Patent: December 28, 2010Assignee: Xilinx, Inc.Inventor: Narasimhan Vasudevan
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Patent number: 7852109Abstract: A method and apparatus involves operating a circuit having a test circuit interrupt input terminal (INTERRUPT), having a test circuit clock output terminal (DUT_CLK), and having first and second operational modes. In the first operational mode the circuit supplies a test circuit clock signal to the test circuit clock output terminal. The circuit responds to receipt of an occurrence of a test circuit interrupt at the test circuit interrupt input terminal by then operating in the second operational mode. In the second operational mode the circuit refrains from supplying the test circuit clock signal to the test circuit clock output terminal.Type: GrantFiled: December 15, 2008Date of Patent: December 14, 2010Assignee: Xilinx, Inc.Inventors: Chi Bun Chan, Jingzhao Ou
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Patent number: 7683666Abstract: A method and apparatus involve operating a circuit that includes a first portion and a second portion, including: operating the first portion in synchronism with a clock signal; maintaining in the first portion a logical value that can vary dynamically; and operating the second portion in a selected one of first and second operational modes. The operating of the second portion includes: responding to the occurrence of a control signal during operation in the first operational mode by causing the second portion to force the logical value in the first portion to a predetermined logical state in a manner asynchronous to the clock signal; and responding to the occurrence of the control signal during operation in the second operational mode by causing the second portion to force the logical value in the first portion to the predetermined logical state in a manner synchronized with the clock signal.Type: GrantFiled: January 21, 2009Date of Patent: March 23, 2010Assignee: XILINX, Inc.Inventor: Schuyler E. Shimanek
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Patent number: 5974261Abstract: A computer system has a processing unit with suspend/resume capability, a memory, and a hard disk drive. In response to a first command from the processor, the hard disk drive sends its status to the processor and the processor stores it in the memory. In response to a second command from the processor, the hard disk accepts from the processor the status retrieved by the processor from the memory, and restores itself to this status. In an alternative embodiment, the hard disk drive response to the first command by storing its status on its own hard disk, and responds to the second command by restoring this status from the hard disk. In each case, an output line from the hard disk used to control a light emitting diode is also selectively used to create an interrupt to the processor which facilitates the systems entry into the suspend mode.Type: GrantFiled: May 9, 1995Date of Patent: October 26, 1999Assignee: Vantus TechnologyInventors: Saifuddin T. Fakhruddin, Jiming Sun, Mark J. Foster, Scott A. Hovey, James L. Walker, Gregory Allen Mart, Randy J. Vanderheyden, Mark A. Ruthenbeck
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Patent number: 5905979Abstract: An abstract manager system (12) and method for managing an abstract database (40) are provided. The abstract manager system (12) may be implemented using a computer that includes a mass storage device (44) and a processor (34). The processor (34) is responsive to one or more computer files stored in the mass storage device (44) such as an abstract manager program (32). The processor (34) is responsive to generate an abstract manager input form (96) and to receive input abstract information in the abstract manager input form (96). The processor (34) is also responsive to generate a record in an abstract database (40) that includes the input abstract information and to generate a file, such as an abstract file of abstract files (42), that includes the input abstract information.Type: GrantFiled: July 2, 1996Date of Patent: May 18, 1999Assignee: Electronic Data Systems CorporationInventor: Sue Ellen Barrows
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Patent number: 5850520Abstract: The invention comprises a method and system for distributing an electronic publication. The invention allows the distribution of customized publications, including customized advertising, customized content, or both. In accordance with the method for distributing an electronic publication, a version of an electronic publication is retrieved from storage. The electronic publication is delivered to the consumer by electronically sending the electronic publication to the consumer's electronic mail address with a return receipt requested. A receipt is then generated in response to the retrieval of the electronic publication from the consumer's electronic mailbox.Type: GrantFiled: July 1, 1996Date of Patent: December 15, 1998Assignee: Electronic Data Systems CorporationInventors: L. Joy Griebenow, Dale S. Howard, Kim Lenger
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Patent number: 5835899Abstract: A system and method (10) for deriving access codes for billing customers includes a load process (12) receiving a set of system attributes (20) and using at least one of the system attributes (20) for looking up in at least one lookup table (16, 18, 22, 24) for an access code and at least one formula value, and further storing the access code and at least one formula value in an access code lookup table (26, 28). The system (10) further includes a derivation process (14) which receives a specification of values for the set of system attributes from a billing record (30), uses the specification of values for looking up in the at least one lookup table (16, 18, 22, 24) for a derivation formula, uses the derivation formula for looking up in the billing record (30) for an attribute value, and further uses the attribute value for comparing with the formula value stored in the access code lookup table (26, 28).Type: GrantFiled: March 1, 1996Date of Patent: November 10, 1998Assignee: Electronic Data Systems CorporationInventors: Sandra T. Rose, John Elstrod, Patricia C. Andrews, Charles G. Forbes, Joseph M. Donovan, Lynn M. Klinger
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Patent number: 5832451Abstract: A method (1000) of automatically managing travel service information is provided. The method generates a business entity profile and individual profile for customers (1004, 1006), and stores the information in a relational database. Customer reservation services information retrieved from all available sources is also stored in the same database (1010). Consequently, the customer reservation services information and the profile information is made available, simultaneously, for use by an agent in processing a customer's travel request (1013).Type: GrantFiled: January 23, 1996Date of Patent: November 3, 1998Assignee: Electronic Data Systems CorporationInventors: Wayne L. Flake, Krishna Kambhampaty, Stephen B. Molsberry, Gregory B. Clem
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Patent number: 5778350Abstract: A system and method (10) for collecting and processing input data (16) and generating output data (24). The system (10) uses a plurality of dictionary tables (22) to control the reading, processing, and outputting of data. The system (10) includes at least one input processing table (32) having format and content information of the input data (16), and at least one output processing table (34) having format and content information of said output data (24). A multi-tasking process (60) is used to spawn a plurality of subtasks (90), each subtask processing one type of data, said subtasks accessing said input processing table (32) for determining how said input data (16) are to be read, and further accessing said output processing table (34) for determining how to create and format said output data (24). Other data dictionary tables (22) are used to track system activity and statistics, define the system that generated the data, and avoid duplicate processing of data.Type: GrantFiled: November 30, 1995Date of Patent: July 7, 1998Assignee: Electronic Data Systems CorporationInventors: Raymond J. Adams, Harriet E. Brichta, Roger J. Henn, Drew A. Hollander, Robert W. Adas, Gerald R. Dolan, Donna M. Bermender, William D. Hawthorne
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Patent number: 5765004Abstract: A laptop computer system includes a protected mode microprocessor capable of operating in restricted and unrestricted modes, and an arrangement which in response to a predetermined condition saves information from the processor and then forcibly switches the processor to its unrestricted mode of operation. When running a multi-tasking operating system where an application program is being executed in a restricted mode, a suspend/resume operation can be carried out in which the system is substantially powered down and then powered back up, and will resume the interrupted application with the restricted mode back in effect. Further, set-up changes such as adjustment of the processor speed can be made without exiting the application program running in the restricted mode.Type: GrantFiled: June 1, 1995Date of Patent: June 9, 1998Assignee: Vantus Technologies, Inc.Inventors: Mark J. Foster, Saifuddin T. Fakhruddin, James L. Walker, Matthew B. Mendelow, Jiming Sun, Rodman S. Brahman, Michael P. Krau, Brian D. Willoughby, Michael D. Maddix, Steven L. Belt, Scott A. Hovey, Mark A. Ruthenbeck