Abstract: A communication system is provided for use in processing systems and the like for carrying out data transfer operations between a first data bus and a peripheral device associated with a second data bus, wherein the first data bus operates at a first clock speed and wherein the second data bus operates. at a second clock speed which is different from the first clock speed and a 1/N integer multiple of the first clock speed. A sample signal associated with the second clock speed is received and the speed of operation of a state machine of a peripheral controller is dynamically adjusted in response to the sample signal such that the state machine of the peripheral controller operates at the second clock speed and causes operations on the second data bus to occur synchronously at the second clock speed.