Patents Represented by Attorney Okamoto & Benedicto LLP
  • Patent number: 8188774
    Abstract: One embodiment relates to a method for activating an interface on an integrated circuit while a core of the integrated circuit is becoming operational. An offset calibration for a transceiver channel is performed by physical media attachment circuitry. A transmitting frequency is locked onto by a transmitter phase-locked loop for the transceiver channel, and a receiving frequency is locked onto by a receiver phase-locked loop for the transceiver channel. Subsequently, the interface is activated while a core component of the integrated circuit is becoming operational. Another embodiment pertains to an integrated circuit which includes transceiver channel circuits, an interface processor, and a reset control state machine. Another embodiment relates to control circuitry including a reset control state machine, transceiver channel circuits, a channel input steering multiplexer, and a channel output steering multiplexer. Other embodiments, aspects and features are also disclosed.
    Type: Grant
    Filed: July 9, 2010
    Date of Patent: May 29, 2012
    Assignee: Altera Corporation
    Inventors: Gopi Krishnamurthy, Binh Ton, Ning Xue, Tim Tri Hoang, Michael Menghui Zheng, Weiqi Ding
  • Patent number: 8188363
    Abstract: A solar cell module includes interconnected solar cells, a transparent cover over the front sides of the solar cells, and a backsheet on the backsides of the solar cells. The solar cell module includes an electrical insulator between the transparent cover and the front sides of the solar cells. An encapsulant protectively packages the solar cells. To prevent polarization, the insulator has resistance suitable to prevent charge from leaking from the front sides of the solar cells to other portions of the solar cell module by way of the transparent cover. The insulator may be attached (e.g., by coating) directly on an underside of the transparent cover or be a separate layer formed between layers of the encapsulant. The solar cells may be back junction solar cells.
    Type: Grant
    Filed: August 7, 2009
    Date of Patent: May 29, 2012
    Assignee: SunPower Corporation
    Inventors: Grace Xavier, Bo Li
  • Patent number: 8191143
    Abstract: Anti-pharming techniques in wireless computer networks at pre-IP state are disclosed. A user computer connecting to a wireless computer network may include an anti-pharming module configured to monitor data communications to and from a wireless access point of the wireless computer network. The anti-pharming module may be configured to determine if data communication going in a direction from the wireless access point to the user computer originated from a wireless station rather than a server configured to dynamically provide network addresses to computers connecting to the wireless computer network. The wireless station may be deemed a malicious computer perpetrating a pharming attack when it originated the data communication and is responding to a request to obtain network address previously sent by the user computer.
    Type: Grant
    Filed: November 13, 2007
    Date of Patent: May 29, 2012
    Assignee: Trend Micro Incorporated
    Inventors: Kun-Shan Lin, Pei-Chun Yao, Chia-Chi Chang
  • Patent number: 8188674
    Abstract: The present invention relates to an LED light emitting device and a driving method, and discloses a technology that may improve a slew rate of a channel current flowing through an LED channel when driving with a pulse width modulation method. For this, the present invention includes an LED channel consisting of a plurality of LED elements that are consecutively and serially connected, a current control switch that is connected to the end of the LED channel and performs a switching operation, and an operational amplifier that controls the switching operation of the current control switch according to a pulse width modulation signal. The LED driver samples an output voltage at the operational amplifier when the pulse width modulation signal is in an on state, and maintains the output voltage of the operational amplifier when the pulse width modulation signal is in an off state.
    Type: Grant
    Filed: June 1, 2010
    Date of Patent: May 29, 2012
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Jin-Hwa Chung, Iiyong Jung, Chan Son, Jaewoon Kim
  • Patent number: 8183921
    Abstract: One embodiment relates to a continuous-time circuit configured with an offset cancellation loop. The continuous-time circuit includes a multi-stage amplifier chain, including a first amplifier stage and a last amplifier stage, and an offset cancellation loop. The offset cancellation loop is configured to receive an output of the last amplifier stage and to provide an offset correction voltage signal to the first amplifier stage. The offset compensation loop may create one dominant pole and a single consequential parasitic pole so as to have greater stability and may advantageously achieve a second-order roll-off in response magnitude at higher frequencies. Other embodiments, aspects, and features are also disclosed.
    Type: Grant
    Filed: November 24, 2010
    Date of Patent: May 22, 2012
    Assignee: Altera Corporation
    Inventors: Sriram Narayan, Xiaoyan Su, Sergey Shumarayev
  • Patent number: 8179172
    Abstract: Disclosed is an auto-restart circuit and auto-restart method. A main integrated circuit (IC) of a main stage controls a switching operation of at least one power switch. The auto-restart circuit for restarting the main IC detects a switching state of the at least one power switch and detects the state of the main IC. The auto-restart circuit cuts off an external power source voltage supply to the main IC or supplies the external power source voltage to the main IC according to switching state and the state of the main IC.
    Type: Grant
    Filed: March 3, 2010
    Date of Patent: May 15, 2012
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Hyun-Chul Eom, Jin-Tae Kim, Gwan-Bon Koo
  • Patent number: 8174269
    Abstract: The present invention relates to an abnormal switching monitoring device and method. A time point when a high-side switch in which a first electrode receives an input voltage is turned on, a time point when a low-side switch that is connected to a second electrode of the high-side switch is turned on, a time point when a charge current begins to flow to a bootstrap circuit, and a time point when a charge current stops flowing to the bootstrap circuit are compared so as to determine whether or not non-zero voltage switching occurs. The bootstrap circuit supplies an operating current to a gate driver controlling a switching operation of the high-side switch.
    Type: Grant
    Filed: November 20, 2009
    Date of Patent: May 8, 2012
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Hyun-Chul Eom, Jin-Tae Kim, Gwan-Bon Koo
  • Patent number: 8169800
    Abstract: A power converter according to the present invention includes a power supply unit, an output unit, and a switching controller. The power supply unit includes a primary coil of a transformer that receives an input voltage, a gate electrode, and a switch having a first electrode and a second electrode that is connected to the primary coil. The output unit includes a secondary coil of the transformer, and outputs an output voltage that is converted from the input voltage by the transformer. The switching controller includes a feedback terminal that receives a feedback voltage corresponding to the output voltage, generates a burst voltage by compensating the feedback voltage according to a maximum current value that can flow between the second electrode and the first electrode of the switch, determines whether to perform a burst mode operation according to the burst voltage, and transmits a gate signal according to performance of the burst mode operation to the gate electrode of the switch.
    Type: Grant
    Filed: May 26, 2009
    Date of Patent: May 1, 2012
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Sang-Cheol Moon, Hang-Seok Choi, Young-Bae Park
  • Patent number: 8171002
    Abstract: A system and a method generates at least one signature associated with document. In one embodiment, a document comprised of text is received and parsed to generate a token set. The token set includes a plurality of tokens. Each token corresponds to the text in the document that is separated by a predefined character characteristic. A score is calculated for each token in the token set based on a frequency and distribution of the text in the document. Each token is then ranked based on the calculated score. A subset of the ranked tokes is selected and a signature is generated for each occurrence of the selected tokens. The selected list of signatures is then output.
    Type: Grant
    Filed: February 17, 2009
    Date of Patent: May 1, 2012
    Assignee: Trend Micro Incorporated
    Inventors: Liwei Ren, Dehua Tan, Fei Huang, Shu Huang, Aiguo Dong
  • Patent number: 8169163
    Abstract: The present invention relates to a control device of a light emitting device that includes a plurality of LED rows formed of a plurality of LEDs sequentially connected in series. The control device includes: a plurality of switches respectively connected to the plurality of LED rows and sequentially transmitting a detection voltage of each of the plurality of LED rows, wherein the detection voltage corresponds to an output voltage applied to the plurality of LED rows; a comparator receiving the plurality of detection voltages, and generating a clock control signal according to a result of comparison with a predetermined reference; a clock signal generator generating a clock signal having a period that is changed according to the clock control signal; and a shift register that controls switching operations of the plurality of switches according to the clock signal.
    Type: Grant
    Filed: November 5, 2009
    Date of Patent: May 1, 2012
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Eunchul Kang, Duckki Kwon, Juho Kim
  • Patent number: 8171467
    Abstract: Malicious code patterns of an antivirus may be updated using public DNS (domain name system) servers. An update to the malicious code patterns may be generated and divided into several portions for inclusion in DNS records. The DNS records may be published for caching in public DNS servers. An update client in a client computer may send out DNS queries to receive contents of the DNS records, which include the portions of the update. The update client may combine the portions to update the malicious code patterns in the client computer.
    Type: Grant
    Filed: July 3, 2007
    Date of Patent: May 1, 2012
    Assignee: Trend Micro Incorporated
    Inventors: Jianda Li, Bharath Kumar Chandrasekhar, Kong Yew Chan
  • Patent number: 8164927
    Abstract: The present invention relates to a switch control device and a switch control method. The present invention controls a switching operation of a power switch that controls output power of a switching mode power supply (SMPS). The present invention generates an operation current corresponding to an input voltage of the SMPS and counts a compensation period in which a power supply voltage generated by the operation current increases from a predetermined counter low-reference voltage to a predetermined counter high-reference voltage. The present invention generates a compensation feedback current depending on the count result, generates a total feedback current by summing a main feedback current having a predetermined value and the compensation feedback current, and generates a power limit current of which a maximum value increases and decreases depending on the total feedback current. Turn-off of the power switch is determined by comparing the current flowing on the power switch with the power limit current.
    Type: Grant
    Filed: December 3, 2009
    Date of Patent: April 24, 2012
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Sang-Cheol Moon, Young-Bae Park
  • Patent number: 8164493
    Abstract: A time-to-digital converter includes a circular delay chain, a phase interpolator, and a time-to-digital (TDC) core. The circular delay chain receives a first input clock and generates a first set of multi-phase clocks by propagating the first input clock through delay cells in the delay chain. The phase interpolator performs phase interpolation with a second input clock and another clock to generate a second set of multi-phase clocks. The other clock may be a delayed version of the second input clock. The TDC core uses the first and second set of multi-phase clocks to determine the time difference between the first and second input clocks.
    Type: Grant
    Filed: April 3, 2009
    Date of Patent: April 24, 2012
    Assignee: Realtek Semiconductor Corporation
    Inventor: Hong-Yean Hsieh
  • Patent number: 8163638
    Abstract: In one embodiment, active diffusion junctions of a solar cell are formed by diffusing dopants from dopant sources selectively deposited on the back side of a wafer. The dopant sources may be selectively deposited using a printing method, for example. Multiple dopant sources may be employed to form active diffusion regions of varying doping levels. For example, three or four active diffusion regions may be fabricated to optimize the silicon/dielectric, silicon/metal, or both interfaces of a solar cell. The front side of the wafer may be textured prior to forming the dopant sources using a texturing process that minimizes removal of wafer material. Openings to allow metal gridlines to be connected to the active diffusion junctions may be formed using a self-aligned contact opening etch process to minimize the effects of misalignments.
    Type: Grant
    Filed: September 15, 2010
    Date of Patent: April 24, 2012
    Assignee: SunPower Corporation
    Inventors: Denis De Ceuster, Peter John Cousins, Richard M. Swanson, Jane E. Manning
  • Patent number: 8158877
    Abstract: In one embodiment, a solar cell installation includes several groups of solar cells. Each group of solar cells has a local power point optimizer configured to control power generation of the group. The local power point optimizer may be configured to determine an optimum operating condition for a corresponding group of solar cells. The local power point optimizer may adjust the operating condition of the group to the optimum operating condition by modulating a transistor, such as by pulse width modulation, to electrically connect and disconnect the group from the installation. The local power point optimizer may be used in conjunction with a global maximum power point tracking module.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: April 17, 2012
    Assignee: SunPower Corporation
    Inventors: David L. Klein, Jan Mark Noworolski
  • Patent number: 8156234
    Abstract: Components of an antivirus program may be updated by multicasting fragments of the update and unicasting missed fragments. The components may include a virus pattern file. The virus pattern file may be divided into several file fragments, with each file fragment being multicast to several client computers. The client computers may receive the file fragments and assemble them into the virus pattern file. The file fragments may be multicast in several rounds. When a client computer misses a file fragment, that client computer may request the missing file fragment from a server computer, which may unicast the missing file fragment to the client computer. An announcement indicating the name of the virus pattern file, the number of file fragments that form the virus pattern file, and the designated server from which to request and receive missed file fragments may be multicast to the client computers prior to the file fragments.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: April 10, 2012
    Assignee: Trend Micro Incorporated
    Inventors: Chih-Yao Sun, Tzun-Liang Wang
  • Patent number: 8148627
    Abstract: Solar cell interconnects with multiple current paths. A solar cell interconnect may include a plurality of in-plane slits arranged in several rows. The in-plane slits may be spaced to provide strain relief without unduly increasing the electrical path resistance through the solar cell interconnect. The in-plane slits may be staggered, for example.
    Type: Grant
    Filed: August 23, 2007
    Date of Patent: April 3, 2012
    Assignee: SunPower Corporation
    Inventors: Douglas H. Rose, Shandor G. Daroczi, Neil Kaminar
  • Patent number: 8148956
    Abstract: The present invention relates to a power factor correction circuit and a method of driving the power factor correction circuit. The power factor correction circuit according to the present invention includes a power transfer element configured to receive an input voltage, an input current corresponding to the input voltage flowing through the power transfer element, and a switch connected to the power transfer element and configured to control an output voltage generated by the current flowing through the power transfer element.
    Type: Grant
    Filed: October 29, 2009
    Date of Patent: April 3, 2012
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Jong-Tae Hwang, Jin-Sung Kim, Moon-Sang Jung, Dae-Ho Kim, Sung-Yun Park
  • Patent number: 8145733
    Abstract: In one embodiment, a Network Address Translation (NAT) server performs address translation services for client computers in a private computer network. A traffic monitor computer outside the private computer network may receive network data processed by the NAT server. The traffic monitor computer may parse network data to obtain application layer information, from which the traffic monitor computer may obtain identification information of the client computer that originally sent the network data. The identification information may include the private IP address of the client computer. In one embodiment, the traffic monitor computer obtains the private IP address of the client computer by examining trace information appended to an e-mail by a mail client running in the client computer.
    Type: Grant
    Filed: February 15, 2006
    Date of Patent: March 27, 2012
    Assignee: Trend Micro Incorporated
    Inventors: Hsu Yu Cheng, Hsu Wei Chiang
  • Patent number: 8143845
    Abstract: A battery charger may be configured to charge a battery by way of a charging cable. A DC gain of a voltage control loop of the battery charger may be limited to a predetermined value to compensate for voltage drop on the charging cable. For example, a DC gain of an error amplifier on the voltage control loop may be limited to a predetermined value for cable voltage drop compensation. The error amplifier may use a reference signal that is generated as a function of the error signal. The DC gain of the error amplifier may be limited by connecting a resistor to form an RC circuit on an output node of the error amplifier.
    Type: Grant
    Filed: December 17, 2008
    Date of Patent: March 27, 2012
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Hangseok Choi