Patents Represented by Attorney, Agent or Law Firm Oligvy Renault
  • Method and circuit for accelerating redundant address matching
    Patent number: 6707734
    Abstract: There is provided a latched comparison circuit for generating complementary latched output signals. The latched comparison circuit includes a comparator circuit for comparing an input address with a redundant address for generating a comparison output signal. The latched comparison circuit further includes a flip-flop circuit coupled to the comparison output signal for latching the comparison output signal and for providing complementary latched comparison output signals in response to a clock signal.
    Type: Grant
    Filed: January 6, 2003
    Date of Patent: March 16, 2004
    Assignee: Mosaid Technologies Incorporated
    Inventor: Paul Demone